19-4750; Rev 1; 07/11 55 of 194 Figure 9-22. Ethernet Port BERT Diagram The Full Channel (Roundtrip) Test" />
參數(shù)資料
型號(hào): DS34S132GN+
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 146/194頁(yè)
文件大?。?/td> 0K
描述: IC TDM OVER PACKET 676-BGA
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 40
功能: TDM-over-Packet(TDMoP)
接口: TDMoP
電路數(shù): 1
電源電壓: 1.8V, 3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 676-BGA
供應(yīng)商設(shè)備封裝: 676-PBGA(27x27)
包裝: 管件
其它名稱: 90-34S13+2N0
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)當(dāng)前第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)第184頁(yè)第185頁(yè)第186頁(yè)第187頁(yè)第188頁(yè)第189頁(yè)第190頁(yè)第191頁(yè)第192頁(yè)第193頁(yè)第194頁(yè)
DS34S132 DATA SHEET
19-4750; Rev 1; 07/11
55 of 194
Figure 9-22. Ethernet Port BERT Diagram
The Full Channel (Roundtrip) Test requires a loopback at the far end (on the right side of the diagram). The S132
Packet BERT Pattern Generator sends a BERT Pattern to the S132 Transmit Ethernet Port. The BERT Monitor
verifies that the data returned at the Receive Ethernet Port is error free.
The Half Channel (one-way) Test requires an equivalent BERT Tester at the far end (on the right side of the
diagram). The S132 Packet BERT Pattern Generator sends a BERT Pattern to the S132 Transmit Ethernet Port.
The far end must use a BERT Pattern Monitor to verify that the data is received error free. Similarly, the far end can
transmit a BERT Pattern in the opposite direction. The S132 BERT Monitor can be used to verify that the data is
received error free.
The Packet BERT Engine can be enabled at the same time as the TDM BERT. The two BERT Engines share
several register settings, so the TDM and Packet BERT tests are not independent of each other. For Half Channel
Packet BERT Testing the Generator and Monitor must be programmed to match what is expected at the far end
(right side of Figure 9-22). There is no register setting to program the BERT Test Engine to “Full” or “Half” Channel
Testing. The connections that are external to the S132 determine the Full vs. Half Channel application.
The S132 Packet BERT Engine uses an Encap BERT Generator and a Decap BERT Monitor. The
MD.EBCR.ETBE enable/disables the Packet BERT Generator and MD.EBCR.ETBBS selects the TXP Bundle that
the generated BERT Test Pattern is to be inserted into. The BERT Test Pattern is placed in the Payload section. If
a Bundle that is programmed to support sub-channel CAS Signaling is assigned to a Packet BERT Test, the sub-
channel CAS Signaling is unaffected (not tested) by the BERT Test. The MD.DBCR.DRBE enable/disables the
Packet BERT Monitor and MD.DBCR.DRBBS selects the RXP Bundle that is to be monitored.
The Packet BERT Engine supports 3 Test Pattern Types: Pseudo-Random Bit Sequence (PRBS), Quasi-Random
Bit Sequence (QRSS) and Repetitive Patterns. The Packet BERT Generator Test Pattern Type is programmed
using EB.BPCR.PTS and EB.BPCR.QRSS. The Packet BERT Monitor Test Pattern Type is programmed using
DB.BPCR.PTS and DB.BPCR.QRSS.
For the Pseudo-Random pattern, the “z” coefficient, “y” coefficient and Seed for the X + Xy +1 PRBS pattern is
selected for the Generator using EB.BPCR.PTF, EB.BPCR.PLF and EB.BPCR.BPS; and for the Monitor using
DB.BPCR.PTF, DB.BPCR.PLF and DB.BPCR.BPS.
For the Quasi-Random pattern the PTF, PLF and BPS registers are ignored and the X20 + X17 +1 QRBS pattern is
used. The Quasi-Random pattern is similar to a PRBS pattern but with the number of “consecutive zeros" in the
pattern limited to 14.
For the Repetitive pattern, the pattern length and pattern value are selected for the Generator using EB.BPCR.PLF
and EB.BPCR.BPS; and for the Monitor using DB.BPCR.PLF and DB.BPCR.BPS. The PTF settings are ignored.
The EB.BCR register is used to program the Packet BERT Generator for New Test Pattern Load (TNPL; initiate
generation of the test pattern) and Test Pattern Inversion (TPIC).
S132
Ethernet
Phy
TXP Packet
Encap BERT
Generator
RXP Packet
Decap BERT
Monitor
Remote Ethernet
Device
Full Channel
Roundtrip
BERT
X
T1/E1
Framer/
LIU
Remote Ethernet
Device
Half
Chan
(1-way)
BERT
BERT
Pattern
BERT
Monitor
PSN
相關(guān)PDF資料
PDF描述
DS34T102GN+ IC TDM OVER PACKET 484TEBGA
DS3501U+H IC POT NV 128POS HV 10-USOP
DS3502U+ IC POT DGTL NV 128TAP 10-MSOP
DS3503U+ IC POT DGTL NV 128TAP 10-MSOP
DS3897MX IC TXRX BTL TRAPEZIODAL 20-SOIC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS34S132GN+ 功能描述:通信集成電路 - 若干 32Port TDM-Over-Pack Transport Device RoHS:否 制造商:Maxim Integrated 類型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube
DS34S132GNA2+ 功能描述:通信集成電路 - 若干 32Port TDM-Over-Pack Transport Device RoHS:否 制造商:Maxim Integrated 類型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube
DS34T101 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Single/Dual/Quad/Octal TDM-over-Packet Chip
DS34T101_08 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Single/Dual/Quad/Octal TDM-over-Packet Chip
DS34T101_09 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Single/Dual/Quad/Octal TDM-over-Packet Chip