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參數(shù)資料
| 型號： | AM79Q062JC |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 編解碼器 |
| 英文描述： | A/MU-LAW, PCM CODEC, PQCC32 |
| 封裝： | PLASTIC, LCC-32 |
| 文件頁數(shù)： | 90/95頁 |
| 文件大?。?/td> | 1399K |
| 代理商： | AM79Q062JC |
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90
Am79Q06/061/062/063 Data Sheet
APPLICATIONS
The QSLAC device performs a programmable codec/
filter function for four telephone lines. It interfaces to the
telephone lines through an AMD SLIC device or a
transformer with external buffering. The QSLAC device
provides latched digital I/O to control and monitor four
SLICs and provides access to time-critical information,
such as off/on-hook and ring trip, for all four channels via
a single read operation or via the upstream C/I bits in the
GCI SC channel. When various country or transmission
requirements must be met, the QSLAC device enables
a single SLIC design for multiple applications. The line
ch aracter istics (such as app arent impe dan ce,
attenuation, and hybrid balance) can be modified by
p r og r a m m in g ea ch Q S LAC devi ce c h a n n e l ’s
coefficients to meet desired performance. The QSLAC
device may require an exter nal buffer to dr ive
transformer SLICs.
In PCM/MPI mode, connection to a PCM back plane is
implemented by means of a simple buffer chip. Several
QSLAC devices can be tied together in one bus
interfacing the back plane through a single buffer. An
intelligent bus interface chip is not required because
each QSLAC device provides its own buffer control
(TSXA/B). The QSLAC device is controlled through the
microprocessor interface, either by a microprocessor on
the linecard or by a central processor.
In GCI mode, the QSLAC device decodes the S0 and S1
inputs and determines the DCL frequency, 2.048 MHz or
4.096 MHz automatically. The QSLAC device transmits
and receives the GCI channel information in accordance
with S0, S1 and DCL, synchronized by Frame Sync.
(FSC). Up to four QSLAC devices can be bussed
together forming one bidirectional 16 channel GCI bus.
A simple inexpensive buffer should be used between the
GCI bus and the backplane of the system.
Controlling the SLIC
T he A m 7 9 Q 0 6 1 Q SL AC dev ic e ha s fi ve T T L -
compatible I/O pins (CD1, CD2, C3, C4 and C5) for each
channel. The Am79Q031 QSLAC device has only CD1
and CD2 available. The outputs are programmed using
MPI Command 19 or the downstream C/I bits in the GCI
SC channel. The logic states are read back using MPI
Command 21 or GCI Command SOP 10. In GCI mode
CD1 (debounced), CD2, and C3 are also present on the
upstream C/I bits in the GCI SC channel. In PCM/MPI
mode, CD1 and CD2 for all four channels can be read
back using MPI Command 16. The direction of the I/O
pins (input or output) is specified by programming the
SLIC I/O direction register (MPI Commands 22, GCI
Command SOP 9).
Default Filter Coefficients
The defa ult filter coefficien ts were calculated
assuming an Am7920 SLIC with 50
protection
resistors, a 178 k
transversal impedance (Z
T), and
a 90.5 k
receive impedance (Z
RX). This SLIC has a
transmit gain of 0.5 (GTX) and a current gain of 500
(K1). The transmit relative level was set to +0.28 dBr,
and the receive relative level was set to –4.39 dBr.
T he e qual iz at ion f il t e r s ( X a n d R ) we r e n o t
optimized. The balance filter was designed to give
acceptable balance into a variety of impedances. The
nominal input impedance was set to 815
. If the
SLIC circuit differs significantly from this design, the
default filters cannot be used and must be replaced
by programmed coefficients.
Calculating Coefficients with WinSLAC Software
WinSLAC software is a program that models the
QSLAC device, the line conditions, the SLIC, and the
linecard components to obtain the coefficients of the
programmable filters of the QSLAC device and some
of the transmission performance plots.
The following parameters relating to the desired line
conditions and the components/circuits used in the
linecard are to be provided as input to the program:
1.
Line impedance or the balance impedance of the
line is specified by the local PTT.
2.
Desired two-wire impedance that is to appear at the
linecard terminals of the exchange.
3.
Tabular data for templates describing the frequency
response and attenuation distortion of the design.
4.
Relative analog signal levels for both the transmit
and receive two-wire signals.
5.
Component values and SLIC device selection for the
analog portion of the line circuits.
6.
Two-wire return loss template is usually specified by
the local PTT.
7.
Four-wire return loss template is usually specified
by the local PTT.
The output from the WinSLAC software includes the
coefficients of the GR, GX, Z, R, X, and B filters as well
as transmission performance plots of two-wire return
loss, receive and transmit path frequency responses,
and four-wire return loss.
The software supports the use of the AMD SLICs or
allows entry of a SPICE netlist describing the behavior
of any type of SLIC circuit.
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