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參數(shù)資料
| 型號(hào)： | AM79Q062JC |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 編解碼器 |
| 英文描述： | A/MU-LAW, PCM CODEC, PQCC32 |
| 封裝： | PLASTIC, LCC-32 |
| 文件頁數(shù)： | 75/95頁 |
| 文件大小： | 1399K |
| 代理商： | AM79Q062JC |
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SLAC Products
77
SOP 11.Write/Read Debounce Time Register*
GCI Command
(C8/C9h)
Enable E1
EE1 = 0*
E1 Multiplexing is turned off
EE1 = 1
E1 Multiplexing is turned on
E1 Polarity
E1P = 0*
E1 is a high-going pulse
E1P = 1
E1 is a low-going pulse
Debounce for Switchhook
DSH = 0–15
Debounce period in ms
DSH contains the debouncing time in ms of the CD1 data (usually switchhook)
entering the CD1B bit of the read SLIC Input/Output register and the CD1B transmitted
on the C/I bit of the upstream SC channel. The input data on CD1 must remain stable
for the debounce time in order for the state of CD1B to change.
RSVD
Reserved for future use. Always write as 0, but 0 is not guaranteed when read.
Enable Chopper
ECH = 0*
Chopper clock output is turned off.
ECH = 1
Chopper clock output is turned on.
Power Up and Hardware Reset (RST) Value = 20h
Note:
* This command applies for all four channels of the device.
SOP 12.Write/Read Ground Key Filter Sampling IntervalGCI Command
(E8/E9h)
R/W = 0: Write
R/W = 1: Read
Filter Ground Key
GK = 0–15
Filter sampling period in ms
GK contains the filter sampling time (in ms) of the CD1B data (usually Ground Key)
or CD2 entering the upstream C/I channel described earlier.
RSVD
Reserved for future use. Always write as 0, but 0 is not guaranteed when read.
Power Up and Hardware Reset (RST) Value = 00h.
Bit
7
6
5
4
3
2
1
0
EE1
E1P
DSH3
DSH2
DSH1
DSH0
RSVD
ECH
Bit
7
6
5
4
3
2
1
0
Command
1
0
1
0
R/W
I/O Data
RSVD
GK3
GK2
GK1
GK0
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