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| 型號(hào)： | AM79Q062JC |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 編解碼器 |
| 英文描述： | A/MU-LAW, PCM CODEC, PQCC32 |
| 封裝： | PLASTIC, LCC-32 |
| 文件頁(yè)數(shù)： | 41/95頁(yè) |
| 文件大小： | 1399K |
| 代理商： | AM79Q062JC |
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46
Am79Q06/061/062/063 Data Sheet
MPI COMMAND STRUCTURE
This section details each MPI command. Each command is shown along with the format of any additional data bytes
that follow. For details of the filter coefficients of the form Cxymxy, refer to the Description of CSD Coefficients section
on page 86.
Unused bits are indicated by “RSVD”; 0’s should be written to them, but 0’s are not guaranteed when they are read.
*Default field values are marked by an asterisk. A hardware reset forces the default values.
1.
Deactivate (Standby State)
MPI Command
(00h)
In the Deactivated mode:
All programmed information is retained.
The Microprocessor Interface (MPI) remains active.
The PCM inputs are disabled and the PCM outputs are high impedance unless
signaling on the PCM highway is programmed (SMODE = 1).
The analog output (VOUT) is disabled and biased at 2.1 V.
The channel status (CS) bit in the SLIC I/O Direction and Channel Status Register is
set to 0.
2.
Software Reset
MPI Command
(02h)
The action of this command is identical to that of the RST pin except that it only operates on the
channels selected by the Channel Enable Register and it does not change clock slots, time slots,
PCM highways, or global chip parameters. See the note under the hardware reset command
that follows.
3.
Hardware Reset
MPI Command
(04h)
Hardware reset is equivalent to pulling the RST on the device Low. This command does not
depend on the state of the Channel Enable Register.
Note: The action of a hardware reset is described in Reset States on page 32 of the section Operating
the QSLAC Device.
D7
D6
D5
D4
D3
D2
D1
D0
Command
0
D7
D6
D5
D4
D3
D2
D1
D0
Command
0
1
0
D7
D6
D5
D4
D3
D2
D1
D0
Command
0
1
0
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