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參數(shù)資料
| 型號(hào)： | AM79Q062JC |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 編解碼器 |
| 英文描述： | A/MU-LAW, PCM CODEC, PQCC32 |
| 封裝： | PLASTIC, LCC-32 |
| 文件頁(yè)數(shù)： | 74/95頁(yè) |
| 文件大?。?/td> | 1399K |
| 代理商： | AM79Q062JC |
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Am79Q06/061/062/063 Data Sheet
SOP 9.Write/Read Operating Mode
GCI Command
(4A/4Bh)
Operating Mode (Configuration Register 5, CR5)
RSVD:
Reserved for future use. Always write as 0, but 0 is not guaranteed when read.
VOUT Mode
VMODE = 0*
VOUT = VREF through a resistor when channel is deactivated
VMODE = 1
VOUT high impedance when channel is deactivated.
Low Power Mode
LPM = 0*
Low Power mode off
LPM = 1
Low Power mode on while all channels are inactive
Power Up and Hardware Reset (RST) Value = 0Fh
SOP 10.Read SLIC Input/Output RegisterGCI Command
(53h)
The logic states present on the CD1, CD2, C3, C4, and C5 pins of the QSLAC device for the
addressed channel are read using this command, independent of their programmed direction
(see SLIC I/O Direction Register). CD1B is the multiplexed CD1 bit and is valid only if the E1
multiplexing mode is enabled (EE = 1). If CD1, CD2, C3, C4, and C5 are programmed as inputs,
then the logic states reported are determined by the external driving signal. In addition, CDA
(the debounced state of CD1) and CDB (the debounced state of CD2, non-E1 multiplexed mode)
or CD1B (E1 multiplexed mode), and the logic state present on the C3 pin of the device are sent
directly upstream on the C/I bits of the upstream SC channel. If the CD1, CD2, C3, C4, and C5
pins are programmed as outputs then the logic states of these pins are controlled directly by
the bits present in the C/I portion of the downstream SC channel and are not sent directly
upstream in the SC channel. This command is normally used only to read the bit status via
Command 53h. It is also possible although not recommended, if the CD1, CD2, and C3–C7 pins
are programmed as outputs, to write the output state as Command 52h. The register is
programmed upon execution of Command 52h but the status is overwritten when the next C/I
portion of the downstream SC channel is received.
Bit
7
6
5
4
3
2
1
0
RSVD
VMODE
LPM
RSVD
Bit
7
6
5
4
3
2
1
0
C7
C6
CD1B
C5
C4
C3
CD2
CD1
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