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參數(shù)資料
| 型號： | AM79Q062JC |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 編解碼器 |
| 英文描述： | A/MU-LAW, PCM CODEC, PQCC32 |
| 封裝： | PLASTIC, LCC-32 |
| 文件頁數(shù)： | 5/95頁 |
| 文件大小： | 1399K |
| 代理商： | AM79Q062JC |
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SLAC Products
13
FUNCTIONAL DESCRIPTION
The QSLAC device performs the codec/filter and two- to
four-wire conversion functions required of the subscriber
line interface circuitry in telecommunications equipment.
These functions involve converting audio signals into
digital PCM samples and converting digital PCM
samples back into audio signals. During conversion,
digital filters are used to band limit the voice signals. All
of the digital filtering is performed in digital signal
processors operating from a master clock, which can be
derived either from PCLK or MCLK in the PCM/MPI
mode and DCL in the GCI mode.
Four independent channels allow the QSLAC device to
function as two DSLAC devices. In the PCM/MPI
mode, each channel has its own enable bit (EC1, EC2,
EC3, and EC4) to allo w indivi dua l channel
programming. If more than one Channel Enable bit is
High or if all Channel Enable bits are High, all channels
enabled will receive the programming information
wr i t te n; th er e for e, a B r oa dc a s t m o d e c a n be
implemented by simply enabling all channels in the
device to receive the information. The Channel Enable
bits are contained in the Channel Enable Register,
which is written and read using Commands 14 and 15.
The Broadcast mode is useful in initializing QSLAC
devices in a large system.
In GCI mode, one GCI channel controls two channels
of the QSLAC device. The Monitor channel and SC
channel within the GCI channel are used to read/write
filter coefficient data, read/write operating conditions
and to read/write data to/from the programmable I/O
por ts of the two channels. Two consecutive GCI
channels control all four channels of the QSLAC
device. The two GCI channels used, of the eight total
available, are determined by S0 and S1 inputs.
The user-programmable filters set the receive and
transmit gain, perform the transhybrid balancing
function, permit adjustment of the two-wire termination
impedance, and provide equalization of the receive
and transmit paths. All programmable digital filter
coefficients can be calculated using the AmSLAC4 or
WinSLAC software.
In PCM/MPI mode, Data transmitted or received on the
PCM highway can be 8-bit companded code (with an
optional 8-bit signaling byte in the transmit direction) or
16-bit linear code. The 8-bit codes appear 1 byte per
time slot, while the 16-bit code appears in two
consecutive time slots. The compressed PCM codes
can be either 8-bit companded A-law or -law. The
PCM data is read from and written to the PCM highway
in user-programmable time slots at rates of 128 kHz to
8.192 MHz. The transmit clock edge and clock slot can
be selected for compatibility with other devices that can
be connected to the PCM highway.
In GCI mode, two 8-bit companded codes are
rece ive d or transmitted p er GCI chan nel. The
co mpr e sse d PCM cod e s can be ei the r 8 - bit
companded A-law or -law. There is no Signaling or
Linear mode available when GCI mode is selected.
Three configurations of the QSLAC device are offered
with single or dual PCM highways (PCM/MPI mode) in
PLCC packages, shown in Connection Diagrams on
Am79Q061JC, with dual and single PCM highways,
respectively, are available in the 44-pin PLCC package.
The Am79Q062 is a single PCM highway version in a
32-pin package. All 32- and 44-pin packaging options
include the programmable GCI interface as an option.
Note:
* Dual PCM highways in PCM mode. Single GCI interface in GCI mode.
PCM/GCI Highway
Programmable I/O
Chopper Clock
Package
Part Number
Dual/Single*
Four
Yes
44 PLCC/TQFP
Am79Q06JC
Single/Single
Five
No
44 PLCC/TQFP
Am79Q061V, JC
Single/Single
Two
No
32 PLCC
Am79Q062JC
Dual/Single
Seven
Yes
64 TQFP
Am79Q063VC
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| AM79Q063VC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
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| AM79Q4457 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Quad Subscriber Line Audio Processing Circuit-Non-Programmable (QSLAC-NP) Devices |
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