參數(shù)資料
型號(hào): AM79Q062JC
廠商: ADVANCED MICRO DEVICES INC
元件分類(lèi): 編解碼器
英文描述: A/MU-LAW, PCM CODEC, PQCC32
封裝: PLASTIC, LCC-32
文件頁(yè)數(shù): 71/95頁(yè)
文件大?。?/td> 1399K
代理商: AM79Q062JC
SLAC Products
73
SOP Control Byte Command Format
SOP 1.Deactivate Channel (Standby Mode)
GCI Command
(00h)
In the Deactivated mode:
All of the programmed information is retained.
The upstream and downstream Monitor and SC channels remain active.
The B channel for a deactivated channel is idle, no data is received or transmitted.
The analog output (VOUT) is disabled and biased at 2.1 V.
The Channel Status (CS) bit in the SLIC I/O and Status Bits register is set to 0.
SOP 2.Software Reset
GCI Command
(02h)
The action of this command is identical to that of the RST pin except it only operates on the
address channel.
SOP 3.Hardware Reset
GCI Command
(04h)
The Hardware reset command is equivalent to pulling the RST pin on the device low. This
command resets all four channels of the device. The action of the Hardware reset function is
described in Reset States on page 32.
SOP 4.Activate Channel (Operational Mode)
GCI Command
(0Eh)
This command places the addressed channel of the device in the Active mode. No valid B-
Channel data is transmitted until after the second FSC pulse is received following the execution
of the Activate command.
SOP 5.Write/Read Operating Conditions
GCI Command
(70/71h)
Operating Conditions (Configuration Register 1, CR1)
Configuration register CR1 enables or disables test features and controls feeding states. The
reset value of CR1 = 04H
Cutoff Transmit Path
CTP = 0*
Transmit path connected
CTP = 1
Transmit path disconnected
Cutoff Receive Path**
CRP = 0*
Receive path connected
CRP = 1
Receive path cutoff
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
4
3
2
1
0
1
0
Bit
7
6
5
4
3
2
1
0
1
0
Bit
7
6
5
4
3
2
1
0
1
0
Bit
7
6
5
4
3
2
1
0
CTP
CRP
HPF
RG
ATI
ILB
FDL
TON
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