參數(shù)資料
型號: AM79Q062JC
廠商: ADVANCED MICRO DEVICES INC
元件分類: 編解碼器
英文描述: A/MU-LAW, PCM CODEC, PQCC32
封裝: PLASTIC, LCC-32
文件頁數(shù): 55/95頁
文件大?。?/td> 1399K
代理商: AM79Q062JC
SLAC Products
59
43, 44. Write/Read B2 Filter Coefficients (IIR)
MPI Command
(96/97h)
R/W = 0: Write
R/W = 1: Read
This function is described in Write/Read B1 Filter Coefficients (FIR) on page 56.
Power Up and Hardware Reset (RST) Values = AC01 (Hex) (B11 = 0.97656)
See note under Commands 31 and 32.
45, 46. Write/Read Debounce Time Register**
MPI Command
(C8/C9h)
R/W = 0: Write
R/W = 1: Read
Enable E1
EE1 = 0*
E1 multiplexing turned off
EE1 = 1
E1 multiplexing turned on
E1 Polarity
E1P = 0*
E1 is a high-going pulse
E1P = 1
E1 is a low-going pulse
There is no E1 output unless CMODE = 1.
Debounce for Switchhook
DSH = 0–15
Debounce period in ms
DSH contains the debouncing time (in ms) of the CD1 data (usually switchhook)
entering the Real Time Data register described earlier. The input data must remain
stable for the debouncing time in order to change the appropriate real time bit.
Double PCLK Operation
DPCK = 0*
Double PCLK operation is off. PCLK and PCM data at same rate.
DPCK = 1
Double PCLK enabled. PCLK operates at twice the PCM data rate.
Enable Chopper
ECH = 0*
Chopper output (CHCLK) turned off
ECH = 1
Chopper output (CHCLK) turned on
* Power Up and Hardware Reset (RST) Value = 20h.
** This command applies to all channels and does not depend on the state of the Channel
Enable Register.
D7
D6
D5
D4
D3
D2
D1
D0
Command
1
0
1
0
1
R/W
I/O Data Byte 1
C411
m411
C311
m311
I/O Data Byte 2
C211
m211
C111
m111
D7
D6
D5
D4
D3
D2
D1
D0
Command
1
0
1
0
R/W
I/O Data
EE1
E1P
DSH3
DSH2
DSH1
DSH0
DPCK
ECH
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