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參數(shù)資料
| 型號： | AM79Q062JC |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 編解碼器 |
| 英文描述： | A/MU-LAW, PCM CODEC, PQCC32 |
| 封裝： | PLASTIC, LCC-32 |
| 文件頁數(shù)： | 60/95頁 |
| 文件大?。?/td> | 1399K |
| 代理商： | AM79Q062JC |
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SLAC Products
63
GENERAL CIRCUIT INTERFACE (GCI)
SPECIFICATIONS
GCI General Description
When the CS/PG device pin is connected to GND and
DCLK/S0 is static (not toggling), GCI operation is
selected. The QSLAC device conforms to the GCI
standard where data for eight GCI channels are
combined into one serial bit stream. A GCI channel
contains the control and voice data for two analog
channels of the QSLAC device. Two GCI channels are
required to access all four channels of the QSLAC
device. The QSLAC device sends Data Upstream out of
the DU pin and receives Downstream Data on the DD
pin. Data clock rate and frame synchronization
information goes to the QSLAC device on the DCL (Data
Clock) and FSC input pins, respectively. Two of eight
GCI channels are selected by connecting the S0 and S1
channel selection pins on the QSLAC device to GND or
VCC as shown in Table 3.
Table 3. GCI Channel Assignment Codes
In the time slot control block (shown in Figure 14), the
Frame Sync (FSC) pulse identifies the beginning of
the Transmit and Receive frames and all GCI chan-
nels are referenced to it. Voice (B1 and B2), C/I, and
monitor data are sent to the Upstream Multiplexer
where they are combined and serially shifted out of the
DU pin during the selected GCI Channels. The Down-
stream Demultiplexer uses the same channel control
block information to demultiplex the incoming GCI
channels into separate voice (B1 and B2), C/I, and
monitor data bytes.
The QSLAC device supports an eight GCI channel bus
(16 analog channels). The external clock applied to the
DCL pin is either 2.048 MHz or 4.096 MHz. The QSLAC
device determines the incoming clock frequency and
adjusts internal timing automatically to accommodate
single or double clock rates.
S1
S0
GCI Channels #
GND
VCC
GND
VCC
GND
VCC
0 & 1
2 & 3
4 & 5
6 & 7
Figure 14. Time Slot Control and GCI Interface
Time Slot
Control
Downstream
Demultiplexer
Voice data for B1 byte
Voice data for B2 byte
C/I Data
Upstream
Multiplexer
S0
DU
DCL
DD
Monitor Data
Voice data for B1 byte
Voice data for B2 byte
C/I Data
Monitor Data
FS
S1
21108A-028
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