
PIC18F2480/2580/4480/4580
DS39637A-page 28
Preliminary
2004 Microchip Technology Inc.
2.7
Clock Sources and Oscillator
Switching
Like
PIC18F2480/2580/4480/4580 family includes a feature
that allows the device clock source to be switched from
the main oscillator to an alternate low-frequency clock
source. PIC18F2480/2580/4480/4580 devices offer
two alternate clock sources. When an alternate clock
source is enabled, the various power managed operat-
ing modes are available.
Essentially, there are three clock sources for these
devices:
Primary oscillators
Secondary oscillators
Internal oscillator block
The
primary oscillators
include the external crystal
and resonator modes, the external RC modes, the
external clock modes and the internal oscillator block.
The particular mode is defined by the FOSC3:FOSC0
configuration bits. The details of these modes are
covered earlier in this chapter.
previous
PIC18
devices,
the
The
secondary oscillators
are those external sources
not connected to the OSC1 or OSC2 pins. These
sources may continue to operate even after the
controller is placed in a power managed mode.
PIC18F2480/2580/4480/4580 devices offer the Timer1
oscillator as a secondary oscillator. This oscillator, in all
power managed modes, is often the time base for
functions such as a real-time clock.
Most often, a 32.768 kHz watch crystal is connected
between the RC0/T1OSO/T13CKI and RC1/T1OSI
pins. Like the LP mode oscillator circuit, loading
capacitors are also connected from each pin to ground.
The Timer1 oscillator is discussed in greater detail in
Section 12.3 “Timer1 Oscillator”
.
In addition to being a primary clock source, the
internal
oscillator block
is available as a power managed
mode clock source. The INTRC source is also used as
the clock source for several special features, such as
the WDT and Fail-Safe Clock Monitor.
The clock sources for the PIC18F2480/2580/4480/4580
devices are shown in Figure 2-8. See
Section 24.0
“Special Features of the CPU”
for Configuration
register details.
FIGURE 2-8:
PIC18F2480/2580/4480/4580 CLOCK DIAGRAM
PIC18F2X80/4X80
4 x PLL
FOSC3:FOSC0
Secondary Oscillator
T1OSCEN
Enable
Oscillator
T1OSO
T1OSI
Clock Source Option
for other Modules
OSC1
OSC2
Sleep
Primary Oscillator
HSPLL, INTOSC/PLL
LP, XT, HS, RC, EC
T1OSC
CPU
Peripherals
IDLEN
P
M
M
8 MHz
4 MHz
2 MHz
1 MHz
500 kHz
250 kHz
125 kHz
OSCCON<6:4>
111
110
101
100
011
010
001
000
31 kHz
INTRC
Source
Internal
Oscillator
Block
8 MHz
WDT, PWRT, FSCM
and Two-Speed Startup
8 MHz
(INTOSC)
Internal Oscillator
OSCCON<6:4>
Clock
Control
OSCCON<1:0>
Source
31 kHz (INTRC)
OSCTUNE<6>
0
1
OSCTUNE<7>