
PIC18F2480/2580/4480/4580
DS39637A-page 112
Preliminary
2004 Microchip Technology Inc.
Example 8-3 shows the sequence to do a 16 x 16
unsigned multiplication. Equation 8-1 shows the
algorithm that is used. The 32-bit result is stored in four
registers (RES3:RES0).
EQUATION 8-1:
16 x 16 UNSIGNED
MULTIPLICATION
ALGORITHM
ARG1H:ARG1L
ARG2H:ARG2L
(ARG1H
ARG2H
2
16
) +
(ARG1H
ARG2L
2
8
) +
(ARG1L
ARG2H
2
8
) +
(ARG1L
ARG2L)
EXAMPLE 8-3:
16 x 16 UNSIGNED
MULTIPLY ROUTINE
ARG1L, W
ARG2L
Example 8-4 shows the sequence to do a 16 x 16
signed multiply. Equation 8-2 shows the algorithm
used. The 32-bit result is stored in four registers
(RES3:RES0). To account for the signed bits of the
arguments, the MSb for each argument pair is tested
and the appropriate subtractions are done.
EQUATION 8-2:
16 x 16 SIGNED
MULTIPLICATION
ALGORITHM
EXAMPLE 8-4:
16 x 16 SIGNED
MULTIPLY ROUTINE
ARG1L, W
ARG2L
; ARG1L * ARG2L ->
; PRODH:PRODL
PRODH, RES1
;
PRODL, RES0
;
RES3:RES0
=
=
MOVF
MULWF
; ARG1L * ARG2L->
; PRODH:PRODL
;
;
MOVFF
MOVFF
PRODH, RES1
PRODL, RES0
;
MOVF
MULWF
ARG1H, W
ARG2H
; ARG1H * ARG2H->
; PRODH:PRODL
;
;
MOVFF
MOVFF
PRODH, RES3
PRODL, RES2
;
MOVF
MULWF
ARG1L, W
ARG2H
; ARG1L * ARG2H->
; PRODH:PRODL
;
; Add cross
; products
;
;
;
MOVF
ADDWF
MOVF
ADDWFC
CLRF
ADDWFC
PRODL, W
RES1, F
PRODH, W
RES2, F
WREG
RES3, F
;
MOVF
MULWF
ARG1H, W
ARG2L
;
; ARG1H * ARG2L->
; PRODH:PRODL
;
; Add cross
; products
;
;
;
MOVF
ADDWF
MOVF
ADDWFC
CLRF
ADDWFC
PRODL, W
RES1, F
PRODH, W
RES2, F
WREG
RES3, F
RES3:RES0 = ARG1H:ARG1L
ARG2H:ARG2L
= (ARG1H
ARG2H
2
16
) +
(ARG1H
ARG2L
2
8
) +
(ARG1L
ARG2H
2
8
) +
(ARG1L
ARG2L) +
(-1
ARG2H<7>
ARG1H:ARG1L
2
16
) +
(-1
ARG1H<7>
ARG2H:ARG2L
2
16
)
MOVF
MULWF
MOVFF
MOVFF
;
MOVF
MULWF
ARG1H, W
ARG2H
; ARG1H * ARG2H ->
; PRODH:PRODL
;
;
MOVFF
MOVFF
PRODH, RES3
PRODL, RES2
;
MOVF
MULWF
ARG1L,W
ARG2H
; ARG1L * ARG2H ->
; PRODH:PRODL
;
; Add cross
; products
;
;
;
MOVF
ADDWF
MOVF
ADDWFC
CLRF
ADDWFC
PRODL, W
RES1, F
PRODH, W
RES2, F
WREG
RES3, F
;
MOVF
MULWF
ARG1H, W
ARG2L
;
; ARG1H * ARG2L ->
; PRODH:PRODL
;
; Add cross
; products
;
;
;
MOVF
ADDWF
MOVF
ADDWFC RES2, F
CLRF
ADDWFC
PRODL, W
RES1, F
PRODH, W
WREG
RES3, F
;
BTFSS
BRA
MOVF
SUBWF
MOVF
SUBWFB
ARG2H, 7
SIGN_ARG1
ARG1L, W
RES2
ARG1H, W
RES3
; ARG2H:ARG2L neg
; no, check ARG1
;
;
;
;
SIGN_ARG1
BTFSS
BRA
MOVF
SUBWF
MOVF
SUBWFB
;
CONT_CODE
:
ARG1H, 7
CONT_CODE
ARG2L, W
RES2
ARG2H, W
RES3
; ARG1H:ARG1L neg
; no, done
;
;
;