
2004 Microchip Technology Inc.
Preliminary
DS39637A-page 197
PIC18F2480/2580/4480/4580
REGISTER 17-3:
SSPSTAT: MSSP STATUS REGISTER (I
2
C MODE)
R/W-0
SMP
bit 7
R/W-0
CKE
R-0
D/A
R-0
P
R-0
S
R-0
R/W
R-0
UA
R-0
BF
bit 0
bit 7
SMP:
Slew Rate Control bit
In Master or Slave mode:
1
= Slew rate control disabled for Standard Speed mode (100 kHz and 1 MHz)
0
= Slew rate control enabled for High-Speed mode (400 kHz)
CKE:
SMBus Select bit
In Master or Slave mode:
1
= Enable SMBus specific inputs
0
= Disable SMBus specific inputs
D/A:
Data/Address bit
In Master mode:
Reserved.
In Slave mode:
1
= Indicates that the last byte received or transmitted was data
0
= Indicates that the last byte received or transmitted was address
P:
Stop bit
1
= Indicates that a Stop bit has been detected last
0
= Stop bit was not detected last
Note:
This bit is cleared on Reset and when SSPEN is cleared.
bit 6
bit 5
bit 4
bit 3
S:
Start bit
1
= Indicates that a Start bit has been detected last
0
= Start bit was not detected last
Note:
This bit is cleared on Reset and when SSPEN is cleared.
R/W:
Read/Write bit Information (I
2
C mode only)
In Slave mode:
1
= Read
0
= Write
Note:
This bit holds the R/W bit information following the last address match. This bit is only
valid from the address match to the next Start bit, Stop bit or not ACK bit.
In Master mode:
1
= Transmit is in progress
0
= Transmit is not in progress
Note:
ORing this bit with SEN, RSEN, PEN, RCEN or ACKEN will indicate if the MSSP is
in Idle mode.
bit 2
bit 1
UA:
Update Address bit (10-bit Slave mode only)
1
= Indicates that the user needs to update the address in the SSPADD register
0
= Address does not need to be updated
BF:
Buffer Full Status bit
In Transmit mode:
1
= Receive complete, SSPBUF is full
0
= Receive not complete, SSPBUF is empty
In Receive mode:
1
= Data transmit in progress (does not include the ACK and Stop bits), SSPBUF is full
0
= Data transmit complete (does not include the ACK and Stop bits), SSPBUF is empty
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown