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參數(shù)資料
| 型號： | W948D6FBHX6G |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | DRAM |
| 英文描述： | 8M X 16 DDR DRAM, 5 ns, PBGA60 |
| 封裝： | 8 X 9 MM, 0.80 MM PITCH, HALOGEN FREE AND LEAD FREE, VFBGA-60 |
| 文件頁數(shù)： | 44/60頁 |
| 文件大?。?/td> | 1147K |
| 代理商： | W948D6FBHX6G |
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W948D6FB / W948D2FB
256Mb Mobile LPDDR
Publication Release Date : May, 24, 2011
- 49 -
Revision A01-003
(256Mb, X32)
PARAMETER
SYMBOL
TEST CONDITION
-5
- 6
- 75
UNIT
Operating one
bank active-
precharge
current
IDD0
tRC = tRCmin ; tCK = tCKmin ; CKE is HIGH;
CS is
HIGH between valid commands; address inputs are
SWITCHING; data bus inputs are STABLE
40
38
35
mA
Precharge
power-down
standby current
IDD2P
all banks idle, CKE is LOW;
CS is HIGH, tCK
= tCKmin ; address and control inputs are
SWITCHING; data bus inputs are STABLE
Low
power
0.3
mA
Normal
power
0.4
Precharge
power-down
standby current
with clock stop
IDD2PS
all banks idle, CKE is LOW;
CS is HIGH, CK
= LOW,
= HIGH; address and control
inputs are SWITCHING; data bus inputs are
STABLE
Low
power
0.3
mA
Normal
power
0.4
Precharge non
power-down
standby current
IDD2N
all banks idle, CKE is HIGH;
CS is HIGH, tCK = tCKmin;
address and control inputs are SWITCHING; data bus
inputs are STABLE
10
mA
Precharge non
power-down
standby current
with clock stop
IDD2NS
all banks idle, CKE is HIGH;
CS is HIGH, CK = LOW,
=
HIGH;
address
and
control
inputs
are
SWITCHING; data bus inputs are STABLE
3
mA
Active power-
down standby
current
IDD3P
one bank active, CKE is LOW;
CS is HIGH, tCK =
tCKmin; address and control inputs are SWITCHING; data
bus inputs are STABLE
3
mA
Active power-
down standby
current with clock
stop
IDD3PS
one bank active, CKE is LOW;
CS is HIGH, CK = LOW,
=
HIGH;
address
and
control
inputs
are
SWITCHING; data bus inputs are STABLE
3
mA
Active non
power-down
standby current
IDD3N
one bank active, CKE is HIGH;
CS is HIGH, tCK =
tCKmin; address and control inputs are SWITCHING; data
bus inputs are STABLE
25
20
mA
Active non
power-down
standby current
with clock stop
IDD3NS
one bank active, CKE is HIGH;
CS is HIGH, CK = LOW,
=
HIGH;
address
and
control
inputs
are
SWITCHING; data bus inputs are STABLE
15
12
mA
Operating burst
read current
IDD4R
one bank active; BL = 4; CL = 3; tCK = tCKmin ;
continuous read bursts; IOUT = 0 mA; address inputs are
SWITCHING; 50% data change each burst transfer
75
70
mA
Operating burst
write current
IDD4W
one bank active; BL = 4; t CK = tCKmin ; continuous write
bursts; address inputs are SWITCHING; 50% data change
each burst transfer
55
50
mA
Auto-Refresh
Current
IDD5
tRC = tRFCmin ; tCK = tCKmin ; burst refresh; CKE is
HIGH; address and control inputs are SWITCHING; data
bus inputs are STABLE
50
mA
Deep Power-
Down current
IDD8(4)
Address and control inputs are STABLE; data bus inputs
are STABLE
10
uA
Notes:
1.
IDD specifications are tested after the device is properly initialized.
2.
Input slew rate is 1V/ns.
3.
Definitions for IDD:
LOW is defined as VIN ≤ 0.1 * VDDQ;HIGH is defined as VIN
≥ 0.9 * VDDQ;STABLE is defined as inputs stable at a HIGH or LOW level;
SWITCHING is defined as:
- Address and command: inputs changing between HIGH and LOW once per two clock cycles;
- Data bus inputs: DQ changing between HIGH and LOW once per clock cycle; DM and DQS are STABLE.
4.
IDD8 is a typical value at 25℃.
CK
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W949D2CB | 制造商:WINBOND 制造商全稱:Winbond 功能描述:512Mb Mobile LPDDR |
| W949D2CBJX5E | 功能描述:IC LPDDR SDRAM 512MBIT 90VFBGA RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 格式 - 存儲器:閃存 存儲器類型:閃存 - NAND 存儲容量:4G（256M x 16） 速度:- 接口:并聯(lián) 電源電壓:2.7 V ~ 3.6 V 工作溫度:0°C ~ 70°C 封裝/外殼:48-TFSOP（0.724"，18.40mm 寬） 供應(yīng)商設(shè)備封裝:48-TSOP I 包裝:Digi-Reel® 其它名稱:557-1461-6 |
| W949D2CBJX5ETR | 制造商:Winbond Electronics Corp 功能描述:512M MDDR, X32, 200MHZ |
| W949D2CBJX5I | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip Mobile LPDDR SDRAM 512M-Bit 16Mx32 1.8V 90-Pin VFBGA |
| W949D2CBJX5I TR | 制造商:Winbond Electronics Corp 功能描述:512M MDDR, X32, 200MHZ, INDUST |
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