參數(shù)資料
型號(hào)： W948D6FBHX6G
廠商： WINBOND ELECTRONICS CORP
元件分類： DRAM
英文描述： 8M X 16 DDR DRAM, 5 ns, PBGA60
封裝： 8 X 9 MM, 0.80 MM PITCH, HALOGEN FREE AND LEAD FREE, VFBGA-60
文件頁(yè)數(shù)： 36/60頁(yè)
文件大?。?/td> 1147K
代理商： W948D6FBHX6G
W948D6FB / W948D2FB
256Mb Mobile LPDDR
Publication Release Date : May, 24, 2011
- 41 -
Revision A01-003
7.10.1 Auto Refresh Command
= Don't Care
(High)
CK
CKE
CS
RAS
CAS
WE
A0-An
BA0,BA1
7.11 Self Referesh
The SELF REFRESH command can be used to retain data in the LPDDR SDRAM, even if the rest of the system is
powered down. When in the Self Refresh mode, the LPDDR SDRAM retains data without external clocking. The
LPDDR SDRAM device has a built-in timer to accommodate Self Refresh operation. The SELF REFRESH command
is initiated like an AUTO REFRESH command except CKE is LOW. Input signals except CKE are “Dont Care”
during Self Refresh. The user may halt the external clock one clock after the SELF REFRESH command is
registered.
Once the command is registered, CKE must be held low to keep the device in Self Refresh mode. The clock is
internally disabled during Self Refresh operation to save power. The minimum time that the device must remain in
Self Refresh mode is tRFC.
The procedure for exiting Self Refresh requires a sequence of commands. First, the clock must be stable prior to
CKE going back High. Once Self Refresh Exit is registered, a delay of at least tXS must be satisfied before a valid
command can be issued to the device to allow for completion of any internal refresh in progress.
The use of Self Refresh mode introduces the possibility that an internally timed refresh event can be missed when
CKE is raised for exit from Self Refresh mode. Upon exit from Self Refresh an extra AUTO REFRESH command is
recommended.
In the Self Refresh mode, one additional power-saving option exist: Partial Array Self Refresh (PASR); It is described
in the Extended Mode Register section.
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