
Preliminary User’s Manual U16541EJ1V0UM
28
LIST OF TABLES (1/4)
Table No.
Title
Page
1-1
V850ES/SG2 Product List ...............................................................................................................................33
2-1
Pin I/O Buffer Power Supplies .........................................................................................................................48
2-2
Pin Operation States in Various Modes...........................................................................................................55
3-1
Program Registers...........................................................................................................................................72
3-2
System Register Numbers...............................................................................................................................73
3-3
Interrupt/Exception Table ................................................................................................................................88
4-1
I/O Buffer Power Supplies for Pins ................................................................................................................114
4-2
Port Configuration..........................................................................................................................................115
4-3
Port 0 Alternate-Function Pins.......................................................................................................................116
4-4
Valid Edge Specification................................................................................................................................120
4-5
Port 1 Alternate-Function Pins.......................................................................................................................121
4-6
Port 3 Alternate-Function Pins.......................................................................................................................123
4-7
Valid Edge Specification................................................................................................................................130
4-8
Port 4 Alternate-Function Pins.......................................................................................................................131
4-9
Port 0 Alternate-Function Pins.......................................................................................................................135
4-10
Port 7 Alternate-Function Pins.......................................................................................................................140
4-11
Port 9 Alternate-Function Pins.......................................................................................................................143
4-12
Valid Edge Specification................................................................................................................................152
4-13
Port CM Alternate-Function Pins ...................................................................................................................153
4-14
Port CT Alternate-Function Pins....................................................................................................................156
4-15
Port DH Alternate-Function Pins ...................................................................................................................159
4-16
Port DL Alternate-Function Pins ....................................................................................................................162
4-17
Using Port Pin as Alternate-Function Pin ......................................................................................................166
5-1
Bus Control Pins (Multiplexed Bus) ...............................................................................................................178
5-2
External Control Pins (Separate Bus)............................................................................................................178
5-3
Pin Status When Internal ROM, Internal RAM, or On-Chip Peripheral I/O Is Accessed ...............................178
5-4
Bus Priority ....................................................................................................................................................195
6-1
Operation Status of Each Clock ....................................................................................................................222
7-1
Configuration of TMP0 to TMP5 ....................................................................................................................229
8-1
TMQ Configuration ........................................................................................................................................271
9-1