參數(shù)資料
型號： TSB12LV01APZ
廠商： Texas Instruments, Inc.
英文描述： High-Speed Serial-Bus Link-Layer Controller
中文描述： 高速串行總線鏈路層控制器
文件頁數(shù)： 50/71頁
文件大小： 267K
代理商： TSB12LV01APZ
5–2
5.2
Recommended Operating Conditions
MIN
NOM
MAX
UNIT
Supply voltage, VCC
Supply voltage, VCC5V
3
3.3
3.6
V
5-V tolerant
4.5
5
5.5
V
Input voltage VI
Input voltage, VI
TTL/LVCMOS
0
VCC
V
5-V tolerant
0
VCC5V
VCC
VCC5V
VCC
VCC5V
Output voltage VO
TTL/LVCMOS
0
V
Output voltage, VO
5-V tolerant
0
High level input voltage VIH
High-level input voltage, VIH
TTL/LVCMOS
2
V
5-V tolerant
2
Low level input voltage VIL
Low-level input voltage, VIL
TTL/LVCMOS
0
0.8
V
5-V tolerant
0
0.8
Input transition time, (tr, tf) (10% to 90%)
TTL/LVCMOS
0
6
ns
Operating free air temperature TA
Operating free-air temperature, TA
TSB12LV01A
0
25
70
°
C
TSB12LV01AI
–40
25
85
Virtual junction temperature, TJC
This applies to external output buffers.
The junction temperatures listed reflect simulation conditions. The absolute maximum junction temperature is 150
°
C.
The customer is responsible for verifying the junction temperature.
0
25
115
°
C
5.3
Electrical Characteristics Over Recommended Ranges of Supply Voltage
and Operating Free-Air Temperature (Unless Otherwise Noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VOH
High-level
High level
output voltage
IOH = –8 mA,
IOH = –4 mA
IOL = 8 mA,
IOL = 4 mA
TTL/LVCMOS
VCC– 0.6
VCC– 0.6
V
VOL
Low-level output
Low level out ut
voltage
TTL/LVCMOS
0.5
V
0.5
Vhys
Hysteresis
(Vt+ – Vt–)
TTL/LVCMOS
0.4
V
TTL/LVCMOS
–1
IIL
Low-level input
current§
VI= VIL(min)
VI = VIL(min)
5-V tolerant
–20
μ
A
D0 – D3, CTL1,
CTL2
–20
TTL/LVCMOS
1
IIH
High-level input
current
VI= VIH(max)
VI = VIH(max)
5-V tolerant
20
μ
A
D0 – D3, CTL1,
CTL2
20
IOZ
High-impedance
-state output
current
VO= VCCor GND
VO = VCC or GND
TTL/LVCMOS
±
20
μ
A
5-V tolerant
±
20
This test condition is for terminals D0 – D3, CTL0, CTL1, CREQ, and CONTENDER
This test condition is for terminals DATA0 – DATA31, CA, INIT, CYCLEOUT, GRFEMP, CYDNE, CYST, NTOUT,
POWERON, and LREQ.
§This specification only applies when pull up and pull down terminator is turned off.
Three-state output must be in high-impedance mode.
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