參數(shù)資料
型號: TSB12LV01APZ
廠商: Texas Instruments, Inc.
英文描述: High-Speed Serial-Bus Link-Layer Controller
中文描述: 高速串行總線鏈路層控制器
文件頁數(shù): 20/71頁
文件大?。?/td> 267K
代理商: TSB12LV01APZ
3–2
0
1
2
3
4
5 6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
29 30 31
00h
Interrupt
C
E
R
T
ATAck
I
I
P
R
P
T
R
P
W
r
T
R
R
R
A
R
I
A
S
H
T
C
C
C
C
C
C
I
F
E
F
E
E
c
C
PhyRgAd
PhyRxAd
Version
Node
Address
Control
FIFO
Control
Cycle
Timer
Interrupt
Mask
Isoch Port
Number
Diagnostics
Phy Chip
Access
Reserved
Reserved
ATF Status
(R/W)
ITF Status
(Read Only)
Reserved
GRF Status
(Read Only)
Reserved
C
C
C
I
I
04h
08h
0Ch
10h
14h
18h
1Ch
20h
24h
28h
2Ch
30h
34h
38h
3Ch
40h
28
T
F
7 Bits
IR Port1
Seconds Count
B
Bus Number
T
T
Rollover @ 8000
Cycle Count
13 Bits Rollover @ 3072
12 Bits
IR Port2
Node Number
Version
PhyRgData
Revision
Cycle Offset
PhyRxData
ATFSpaceCount
ITFSpaceCount
WriteCount
R
A
3031-3042
R
R
S
F
A
C
M
C
Trigger Size
ATFSize
ITFSize
C
C
C
A
R
AdrCounter
P
GRFTotalCnt
GRFSize
C
I
P
P
T
R
P
I
A
S
H
T
C
C
C
C
C
C
I
S
F
A
C
A
A
NOTE A: All gray areas (bits) are reserved bits.
Figure 3–1. Internal Register Map
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