
SiI3512 PCI to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
48
2007-2010 Silicon Image, Inc. All rights reserved.
DS-0102-D01
CONFIDENTIAL
Address
Offset
Register Name
Access
Type
31
16
15
00
0x34
Reserved
-
0x38
Reserved
-
0x3C
Reserved
-
0x40
FIFO Valid Byte Count – IDE0
FIFO Wr Request
Control – IDE0
FIFO Rd Request
Control – IDE0
R/W
0x44
FIFO Valid Byte Count – IDE1
FIFO Wr Request
Control – IDE1
FIFO Rd Request
Control – IDE1
R/W
0x48
System Configuration Status
System Command
R/W
0x4C
System Software Data
R/W
0x50
Flash Memory Address – Command and Status
R/W
0x54
Reserved
Flash Memory Data
R/W
0x58
EEPROM Memory Address – Command and Status
R/W
0x5C
Reserved
EEPROM Memory
Data
R/W
0x60
FIFO Port – IDE0
R/W
0x64
Reserved
-
0x68
FIFO Byte1 Write
Pointer – IDE0
FIFO Byte1 Read
Pointer – IDE0
FIFO Byte0 Write
Pointer – IDE0
FIFO Byte0 Read
Pointer – IDE0
R
0x6C
FIFO Byte3 Write
Pointer – IDE0
FIFO Byte3 Read
Pointer – IDE0
FIFO Byte2 Write
Pointer – IDE0
FIFO Byte2 Read
Pointer – IDE0
R
0x70
FIFO Port – IDE1
R/W
0x74
Reserved
-
0x78
FIFO Byte1 Write
Pointer – IDE1
FIFO Byte1 Read
Pointer – IDE1
FIFO Byte0 Write
Pointer – IDE1
FIFO Byte0 Read
Pointer – IDE1
R
0x7C
FIFO Byte3 Write
Pointer – IDE1
FIFO Byte3 Read
Pointer – IDE1
FIFO Byte2 Write
Pointer – IDE1
FIFO Byte2 Read
Pointer – IDE1
R
0x80
IDE0 TF Starting
Sector Number
IDE0 TF Sector
Count
IDE0 TF Features
IDE0 TF Error
IDE0 TF Data
R/W
0x84
IDE0 TF
Command+Status
IDE0 TF
Device+Head
IDE0 TF Cylinder
High
IDE0 TF Cylinder
Low
R/W
0x88
Reserved
IDE0 TF Device
Control Auxiliary
Status
Reserved
R/W
0x8C
IDE0 Read Ahead Data
R/W
0x90
IDE0 TF Starting
Sector Number2
IDE0 TF Sector
Count2
IDE0 TF Features2
IDE0 TF Error2
Reserved
R/W
0x94
IDE0 TF Cmd
IDE0 TF
Device+Head2
IDE0 TF Cylinder
High2
IDE0 TF Cylinder
Low2
R/W
0x98
IDE0 TF Cylinder
High 2 Ext
IDE0 TF Cylinder
Low 2 Ext
IDE0 TF Starting
Sector 2 Ext
IDE0 TF Sector
Count 2 Ext
R/W
0x9C
IDE0 Virtual DMA/PIO Read Ahead Byte Count
R/W
0xA0
Reserved
IDE0 Config +
Status
IDE0
Cmd + Status
R/W
0xA4
Reserved
R/W
0xA8
Reserved
R/W
0xAC
Reserved
R/W
0xB0
IDE0 Test Register
R/W
0xB4
Reserved
IDE0 Data Transfer
Mode
R/W
0xB8
Reserved
-
0xBC
Reserved
-