參數(shù)資料
型號： SII3512ECTU128
元件分類： 總線控制器
英文描述： PCI BUS CONTROLLER, PQFP128
封裝： LEAD FREE, TQFP-128
文件頁數(shù)： 70/132頁
文件大?。?/td> 3011K
代理商： SII3512ECTU128
SiI3512 PCI to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
34
2007-2010 Silicon Image, Inc. All rights reserved.
DS-0102-D01
CONFIDENTIAL
Subsystem ID – Subsystem Vendor ID
Address Offset: 0x2C
Access Type: Read/Write
Reset Value: 0x3512_1095
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Subsystem ID
Subsystem Vendor ID
This register defines the Subsystem ID fields associated with the PCI bus. The register bits are defined below.
Bit [31:16]: Subsystem ID (R). The value in this bit field is determined by any one of three options:
1)
The default value of 0x3512.
2)
Loaded from an external memory device: If an external memory device – flash or EEPROM – is
present with the correct signature, the Subsystem ID is loaded from that device after reset. See Auto-
Initialization section on page 25 for additional information.
3)
System programmable: If Bit 0 of the Configuration register (0x40) is set, the two bytes are system
programmable.
Bit [15:00]: Subsystem Vendor ID (R). The value in this bit field is determined by any one of three options:
1)
The default value of 0x1095.
2)
Loaded from an external memory device: If an external memory device – flash or EEPROM – is
present with the correct signature, the Subsystem Vendor ID is loaded from that device after reset. See
Auto-Initialization section on page 25 for additional information.
3)
System programmable: If Bit 0 of the Configuration register (0x40) is set, the two bytes are system
programmable.
Expansion ROM Base Address
Address Offset: 0x30
Access Type: Read/Write
Reset Value: 0x0000_0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Expansion ROM Base Address
Not Used
E
xp
ROM
E
n
ab
le
This register defines the Expansion ROM base address associated with the PCI bus. The register bits are defined below.
Bit [31:19]: Expansion ROM Base Address (R/W) – Expansion ROM Base Address. This bit field defines the
upper bits of the Expansion ROM base address.
Bit [18:01]: Not Used (R). This bit field is hardwired to 0x00000. The minimum Expansion ROM address range
is 512K bytes.
Bit [00]: Exp ROM Enable (R/W) – Expansion ROM Enable. This bit is set to enable the Expansion ROM access.
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