參數(shù)資料
型號: S1C63653F
元件分類: 微控制器/微處理器
英文描述: 4-BIT, FLASH, 4 MHz, MICROCONTROLLER, CQFP100
封裝: CERAMIC, QFP15-100
文件頁數(shù): 74/121頁
文件大小: 1127K
代理商: S1C63653F
48
EPSON
S1C63653 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (LCD Driver)
4.8 LCD Driver (COM0–COM5, SEG0–SEG31)
4.8.1 Configuration of LCD driver
The S1C63653 has 6 common terminals (COM0–COM5) and 32 segment terminals (SEG0–SEG31), so that
it can drive an LCD with a maximum of 192 (32
× 6) segments.
The driving method is 1/6 duty, 1/5 duty, 1/4 duty or 1/3 duty dynamic drive with three voltages (1/3
bias), VC1, VC2 and VC3.
LCD display on/off can be controlled by the software.
4.8.2 Power supply for LCD driving
The power supply for driving LCD can be selected from the internal power supply and an external power
supply.
When the internal power supply is selected, the LCD drive voltages VC1–VC3 are generated by the built-in
LCD system voltage circuit. The LCD system voltage circuit is turned on and off using the LPWR register.
When LPWR is set to "1", the LCD system voltage circuit outputs the LCD drive voltages VC1–VC3 to the
LCD driver. The LCD system voltage circuit generates VC1 with the voltage regulator built-in, and
generates two other voltages (VC2 = 2VC1, VC3 = 3VC1) by boosting VC1.
When using an external power supply, select the voltage from the following 3 types and supply the LCD
drive voltage to the VC1–VC3 terminals.
1) External power supply 1/3 bias (for 4.5 V panel) VDD = VC2
2) External power supply 1/3 bias (for 3.0 V panel) VDD = VC3
3) External power supply 1/2 bias (for 3.0 V panel) VDD = VC3, VC1 = VC2 (static drive function is available)
Note that the power control using the LPWR register is necessary even if an external power supply is
used. SEG output ports that are set for DC output by the mask option operate same as the output (R) port
regardless of the power on/off control by the LPWR register.
4.8.3 Control of LCD display and drive waveform
(1) Display on/off control
The S1C63653 incorporates the ALON and ALOFF registers to blink display. When "1" is written to
ALON, all the segments go on, and when "1" is written to ALOFF, all the segments go off. At such a
time, an on waveform or an off waveform is output from SEG terminals. When "0" is written to these
registers, normal display is performed. Furthermore, when "1" is written to both of the ALON and
ALOFF, ALON (all on) has priority over the ALOFF (all off).
(2) Setting of drive duty
In the S1C63653, the drive duty can be set to 1/6, 1/5, 1/4 or 1/3 using the LDUTY1 and LDUTY0
registers as shown in Table 4.8.3.1.
Table 4.8.3.1 LCD drive duty setting
LDUTY1
1
0
LDUTY0
1
0
1
0
Drive duty
1/3
1/6
1/5
1/4
Common terminal used
COM0–COM2
COM0–COM5
COM0–COM4
COM0–COM3
Maximum segment number
96 (32
× 3)
192 (32
× 6)
160 (32
× 5)
128 (32
× 4)
Table 4.8.3.2 shows the frame frequency corresponding to the drive duty.
Table 4.8.3.2 Frame frequency
OSC1 oscillation
frequency
32.768 kHz
When 1/6 or 1/3 duty
is selected
42.7 Hz
When 1/5 duty
is selected
25.6 Hz
When 1/4 duty
is selected
32 Hz
Figures 4.8.3.1 to 4.8.3.4 show the dynamic drive waveform according to the duty.
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