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參數(shù)資料
| 型號(hào)： | S1C63653F |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, FLASH, 4 MHz, MICROCONTROLLER, CQFP100 |
| 封裝： | CERAMIC, QFP15-100 |
| 文件頁(yè)數(shù)： | 40/121頁(yè) |
| 文件大?。?/td> | 1127K |
| 代理商： | S1C63653F |
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S1C63653 TECHNICAL MANUAL
EPSON
17
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Memory Map)
CHAPTER
4 PERIPHERAL CIRCUITS AND OPERATION
The peripheral circuits of S1C63653 (timer, I/O, etc.) are interfaced with the CPU in the memory
mapped I/O method. Thus, all the peripheral circuits can be controlled by accessing the I/O memory on
the memory map using the memory operation instructions. The following sections explain the detailed
operation of each peripheral circuit.
4.1 Memory Map
The S1C63653 data memory consists of 512-word RAM, 1,024-word data ROM, 48-word display memory
and 70-word peripheral I/O memory. Figure 4.1.1 shows the overall memory map of the S1C63653, and
Table 4.1.1 the peripheral circuits' (I/O space) memory maps.
0000H
0200H
8000H
8400H
F000H
FF00H
FFFFH
RAM area
Unused area
Data ROM area
I/O memory area
Display memory area
Unused area
Peripheral I/O area
F000H
F030H
FF00H
FFFFH
Fig. 4.1.1 Memory map
Note: Memory is not implemented in unused areas within the memory map. Further, some non-imple-
mentation areas and unused (access prohibition) areas exist in the peripheral I/O area. If the
program that accesses these areas is generated, its operation cannot be guaranteed. Refer to the
I/O memory maps shown in Table 4.1.1 for the peripheral I/O area.
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