參數(shù)資料
型號(hào): S1C63653F
元件分類: 微控制器/微處理器
英文描述: 4-BIT, FLASH, 4 MHz, MICROCONTROLLER, CQFP100
封裝: CERAMIC, QFP15-100
文件頁數(shù): 103/121頁
文件大?。?/td> 1127K
代理商: S1C63653F
74
EPSON
S1C63653 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Programmable Timer)
EIPT0, ECTC0: Timer 0 interrupt mask registers (FFE1HD0, FFE0HD0)
EIPT1, ECTC1: Timer 1 interrupt mask registers (FFE1HD1, FFE0HD1)
These registers are used to select whether to mask the programmable timer interrupt or not.
When "1" is written: Enabled
When "0" is written: Masked
Reading: Valid
EIPTx and ECTCx are the interrupt mask registers that respectively correspond to the counter underflow
and compare match interrupt factors. Interrupts set to "1" are enabled and interrupts set to "0" are disa-
bled.
At initial reset, these registers are set to "0".
IPT0, ICTC0: Timer 0 interrupt factor flags (FFF1HD0, FFF0HD0)
IPT1, ICTC1: Timer 1 interrupt factor flags (FFF1HD1, FFF0HD1)
These flags indicate the status of the programmable timer interrupt.
When "1" is read: Interrupt has occurred
When "0" is read: Interrupt has not occurred
When "1" is written: Flag is reset
When "0" is written: Invalid
IPTx and ICTCx are the interrupt factor flags that respectively correspond to the interrupts for counter
underflow and compare match, and are set to "1" by generation of each factor.
The underflow interrupt factor is generated at the point where the counter underflows.
The compare match interrupt factor is generated if the counter data and the compare data are matched
when the timer is set in the PWM mode.
The software can judge from these flags whether there is a programmable timer interrupt. However, even
if the interrupt is masked, the flags are set to "1" by an underflow and compare match of the correspond-
ing counter.
These flags are reset to "0" by writing "1" to them.
After an interrupt occurs, the same interrupt will occur again if the interrupt enabled state (I flag = "1") is
set or the RETI instruction is executed unless the interrupt factor flag is reset. Therefore, be sure to reset
(write "1" to) the interrupt factor flag in the interrupt service routine before shifting to the interrupt
enabled state.
At initial reset, these flags are set to "0".
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