
S1C63653 TECHNICAL MANUAL
EPSON
i
CONTENTS
CONTENTS
CHAPTER
1OUTLINE ________________________________________________ 1
1.1
Features ......................................................................................................... 1
1.2Block Diagram .............................................................................................. 2
1.3
Pad Layout .................................................................................................... 3
1.3.1 Diagram of pad layout ............................................................................... 3
1.3.2 Pad coordinates .......................................................................................... 4
1.4
Pin Description ............................................................................................. 5
1.5
Mask Option .................................................................................................. 6
CHAPTER
2POWER SUPPLY AND INITIAL RESET ____________________________ 9
2.1
Power Supply ................................................................................................ 9
2.1.1 Voltage regulator for OSC1 oscillation circuit ......................................... 10
2.1.2 Low-speed operation voltage regulator .................................................... 10
2.1.3 High-speed operation voltage regulator ................................................... 10
2.1.4 Internal operating voltage VD1 ....................................................................................... 10
2.1.5 LCD system voltage circuit ....................................................................... 10
2.1.6 Halver mode and saving power ................................................................ 11
2.1.7 Analog system power supply ..................................................................... 11
2.2
Initial Reset .................................................................................................. 12
2.2.1 Reset terminal (RESET) ............................................................................ 12
2.2.2 Simultaneous high input to terminals K00–K03 ...................................... 13
2.2.3 Internal register at initial resetting ........................................................... 13
2.2.4 Terminal settings at initial resetting ......................................................... 14
2.3
Test Terminal (TEST) ................................................................................... 14
CHAPTER
3 CPU, ROM, RAM ________________________________________ 15
3.1
CPU .............................................................................................................. 15
3.2
Code ROM .................................................................................................... 15
3.3
RAM ............................................................................................................. 15
3.4
Data ROM .................................................................................................... 16
CHAPTER
4PERIPHERAL CIRCUITS AND OPERATION __________________________ 17
4.1
Memory Map ................................................................................................ 17
4.2
Power Control .............................................................................................. 23
4.2.1 Configuration of power supply circuit ...................................................... 23
4.2.2 Power control procedure ........................................................................... 24
4.2.3 I/O memory for power control .................................................................. 25
4.2.4 Programming notes ................................................................................... 27
4.3Watchdog Timer ........................................................................................... 28
4.3.1 Configuration of watchdog timer .............................................................. 28
4.3.2 Interrupt function ...................................................................................... 28
4.3.3 I/O memory of watchdog timer ................................................................. 29
4.3.4 Programming notes ................................................................................... 29