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參數(shù)資料
| 型號： | PERICOMPI7C8150 |
| 廠商： | Pericom Semiconductor Corp. |
| 英文描述： | 2-Port PCI-to-PCI Bridge |
| 中文描述： | 2端口PCI至PCI橋 |
| 文件頁數(shù)： | 90/106頁 |
| 文件大小： | 904K |
| 代理商： | PERICOMPI7C8150 |
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PI7C8150
2-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
80
August 22, 2002 – Revision 1.02
20:16
Expansion Slot
Number
R/W
Determines expansion slot number
Reset to 0
First in chassis
21
First in Chassis
R/W
Reset to 0
Reserved. Returns 0 when read. Reset to 0.
23:22
Reserved
R/O
14.1.49
CHASSIS NUMBER REGISTER – OFFSET B0h
Bit
Function
Type
Description
Chassis number register.
31:24
Chassis Number
Register
R/W
Reset to 0
14.1.50
CAPABILITY ID REGISTER – OFFSET DCh
Bit
Function
Enhanced
Capabilities ID
Type
Description
Read as 01h to indicate that these are power management enhanced
capability registers.
7:0
R/O
14.1.51
NEXT ITEM POINTER REGISTER – OFFSET DCh
Bit
Function
Next Item
Pointer
Type
Description
Points to slot number register (0Bh).
15:8
R/O
14.1.52
POWER MANAGEMENT CAPABILITIES REGISTER – OFFSET
DCh
Bit
Function
Power
Management
Revision
PME# Clock
Type
Description
Read as 001 to indicate the device is compliant to Revision 1.0 of
PCI Power Management Interface Specifications.
18:16
R/O
19
R/O
Read as 0 to indicate PI7C8150 does not support the PME# pin.
Read as 0 to indicate PI7C8150 does not support the PME# pin or an
auxiliary power source.
Read as 0 to indicate PI7C8150 does not have device specific
initialization requirements.
Read as 0
Read as 0 to indicate PI7C8150 does not support the D1 power
management state.
Read as 0 to indicate PI7C8150 does not support the D2 power
management state.
Read as 0 to indicate PI7C8150 does not support the PME# pin.
20
Auxiliary Power
R/O
21
Device Specific
Initialization
Reserved
D1 Power State
Support
D2 Power State
Support
PME# Support
R/O
24:22
R/O
25
R/O
26
R/O
31:27
R/O
14.1.53
POWER MANAGEMENT DATA REGISTER – OFFSET E0h
Bit
Function
Type
Description
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