
MOTOROLA
Tables
xlvii
TABLES
Table
Number
Title
Page
Number
10-12
10-13
10-14
10-15
10-16
10-17
10-18
10-19
10-20
10-21
10-22
10-23
10-24
10-25
10-26
10-27
10-28
10-29
10-30
10-31
10-32
10-33
10-34
10-35
10-36
10-37
10-38
10-39
10-40
10-41
10-42
10-43
12-1
12-2
12-3
vii
13-1
13-2
13-3
13-4
13-5
13-6
13-7
60x Bus-Assigned UPM Refresh Timer (PURT)..................................................10-30
Local Bus-Assigned UPM Refresh Timer (LURT)...............................................10-31
60x Bus-Assigned SDRAM Refresh Timer (PSRT).............................................10-31
LSRT Field Descriptions.......................................................................................10-32
MPTPR Field Descriptions....................................................................................10-32
SDRAM Interface Signals.....................................................................................10-33
SDRAM Interface Commands...............................................................................10-35
SDRAM Address Multiplexing (A0–A15)............................................................10-37
SDRAM Address Multiplexing (A16–A31)..........................................................10-38
60x Address Bus Partition.....................................................................................10-48
SDRAM Device Address Port during activate Command ....................................10-49
SDRAM Device Address Port during read/write Command.................................10-49
Register Settings (Page-Based Interleaving...........................................................10-49
60x Address Bus Partition.....................................................................................10-50
SDRAM Device Address Port during activate Command ....................................10-50
SDRAM Device Address Port during read/write Command.................................10-50
Register Settings (Bank-Based Interleaving).........................................................10-51
GPCM Interfaces Signals ......................................................................................10-51
GPCM Strobe Signal Behavior..............................................................................10-52
TRLX and EHTR Combinations...........................................................................10-58
Boot Bank Field Values after Reset.......................................................................10-62
UPM Interfaces Signals.........................................................................................10-62
UPM Routines Start Addresses .............................................................................10-65
RAM Word Bit Settings ........................................................................................10-71
MxMR Loop Field Usage......................................................................................10-76
UPM Address Multiplexing...................................................................................10-77
60x Address Bus Partition.....................................................................................10-80
DRAM Device Address Port during an activate command...................................10-80
Register Settings....................................................................................................10-80
UPMs Attributes Example.....................................................................................10-82
UPMs Attributes Example.....................................................................................10-90
EDO Connection Field Value Example.................................................................10-92
TAP Signals.............................................................................................................12-2
Boundary Scan Bit Definition .................................................................................12-6
Instruction Decoding .............................................................................................12-29
Acronyms and Abbreviated Terms..........................................................................IV-v
Possible MPC8260 Applications.............................................................................13-3
Peripheral Prioritization...........................................................................................13-6
RISC Controller Configuration Register Field Descriptions...................................13-8
RTSCR Field Descriptions....................................................................................13-10
RISC Microcode Revision Number.......................................................................13-10
CP Command Register Field Descriptions............................................................13-11
CP Command Opcodes..........................................................................................13-13