
MOTOROLA
Contents
xv
CONTENTS
Paragraph
Number
Title
Page
Number
12.5
12.6
MPC8260 Restrictions.....................................................................................12-30
Nonscan Chain Operation................................................................................12-30
Chapter 13
Communications Processor Module Overview
13.1
13.2
13.3
13.3.1
13.3.2
13.3.3
13.3.4
13.3.5
13.3.6
13.3.7
13.3.8
13.3.9
13.4
13.4.1
13.4.1.1
13.4.2
13.4.3
13.5
13.5.1
13.5.2
13.6
13.6.1
13.6.2
13.6.3
13.6.4
13.6.5
13.6.6
13.6.7
13.6.8
13.6.9
13.6.10
Features..............................................................................................................13-1
MPC8260
Serial Configurations........................................................................13-3
Communications Processor (CP) .......................................................................13-4
Features..........................................................................................................13-4
CP Block Diagram .........................................................................................13-4
PowerPC Core Interface.................................................................................13-6
Peripheral Interface........................................................................................13-6
Execution from RAM.....................................................................................13-7
RISC Controller Configuration Register (RCCR) .........................................13-7
RISC Time-Stamp Control Register (RTSCR)..............................................13-9
RISC Time-Stamp Register (RTSR)............................................................13-10
RISC Microcode Revision Number.............................................................13-10
Command Set...................................................................................................13-11
CP Command Register (CPCR)...................................................................13-11
CP Commands..........................................................................................13-13
Command Register Example........................................................................13-15
Command Execution Latency......................................................................13-15
Dual-Port RAM................................................................................................13-15
Buffer Descriptors (BDs).............................................................................13-17
Parameter RAM ...........................................................................................13-17
RISC Timer Tables...........................................................................................13-18
RISC Timer Table Parameter RAM.............................................................13-19
RISC Timer Command Register (TM_CMD) .............................................13-20
RISC Timer Table Entries............................................................................13-21
RISC Timer Event Register (RTER)/Mask Register (RTMR)....................13-21
set timer Command......................................................................................13-22
RISC Timer Initialization Sequence ............................................................13-22
RISC Timer Initialization Example .............................................................13-22
RISC Timer Interrupt Handling...................................................................13-23
RISC Timer Table Scan Algorithm..............................................................13-23
Using the RISC Timers to Track CP Loading .............................................13-24