
MOTOROLA
Illustrations
xxxiii
ILLUSTRATIONS
Figure
Number
Title
Page
Number
1-1
1-2
1-3
1-4
1-5
1-6
1-7
1-8
1-9
1-10
1-11
2-1
2-2
2-3
2-4
2-5
2-6
4-1
4-2
4-3
4-4
4-5
4-6
4-7
4-8
4-9
4-10
4-11
4-12
4-13
4-14
4-15
4-16
4-17
4-18
4-19
MPC8260 Block Diagram .........................................................................................1-5
MPC8260 External Signals........................................................................................1-8
Remote Access Server Configuration......................................................................1-11
Regional Office Router Configuration ....................................................................1-12
LAN-to-WAN Bridge Router Configuration...........................................................1-13
Cellular Base Station Configuration........................................................................1-14
Telecommunications Switch Controller Configuration...........................................1-14
SONET Transmission Controller Configuration.....................................................1-15
Basic System Configuration....................................................................................1-16
High-Performance Communication.........................................................................1-16
High-Performance System Microprocessor Configuration.....................................1-17
MPC8260 Integrated Processor Core Block Diagram...............................................2-2
MPC8260 Programming Model—Registers............................................................2-10
Hardware Implementation Register 0 (HID0).........................................................2-11
Hardware Implementation Register 1 (HID1).........................................................2-15
Hardware Implementation-Dependent Register 2 (HID2) ......................................2-15
Data Cache Organization.........................................................................................2-20
.SIU Block Diagram ..................................................................................................4-1
System Configuration and Protection Logic..............................................................4-3
Timers Clock Generation...........................................................................................4-4
TMCNT Block Diagram............................................................................................4-5
PIT Block Diagram....................................................................................................4-5
Software Watchdog Timer Service State Diagram....................................................4-6
Software Watchdog Timer Block Diagram...............................................................4-7
MPC8260 Interrupt Structure....................................................................................4-8
Interrupt Request Masking ......................................................................................4-14
SIU Interrupt Configuration Register (SICR)..........................................................4-17
SIU Interrupt Priority Register (SIPRR)..................................................................4-18
CPM High Interrupt Priority Register (SCPRR_H) ................................................4-19
CPM Low Interrupt Priority Register (SCPRR_L) .................................................4-20
SIPNR_H Fields ......................................................................................................4-21
SIPNR_L Fields.......................................................................................................4-21
SIMR_H Register ....................................................................................................4-22
SIMR_L Register.....................................................................................................4-23
SIU Interrupt Vector Register (SIVEC) ..................................................................4-23
Interrupt Table Handling Example..........................................................................4-24