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參數(shù)資料
| 型號(hào)： | MD8412B |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | LINK(IEEE 1394) |
| 中文描述： | 鏈接（1394） |
| 文件頁(yè)數(shù)： | 89/114頁(yè) |
| 文件大?。?/td> | 577K |
| 代理商： | MD8412B |
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MD8412B
Ver 1.10
FUJIFUILM MICRODEVICES CO., LTD.
77
5-4
Isochronous transfer control (auto-mode)
Isochronous data transfer is conducted either in normal mode or in auto-mode. In the normal mode, the host uses a packet
and its header for buffer writing in the MD8412B during transmission in the same manner as for asynchronous data transfer.
At that time, ITGo is issued for a different channel in the unit of packet group, in order to send a transmission request to the
MD8412B. During reception also, reading is started in the unit of packet group inclusive of the header when the MD8412B
has received the packet.
In the auto-mode, on the other hand, insertion of the isochronous packet header is conducted by the MD8412B during trans-
mission, and separation of this header is conducted during reception. In this fashion, the host can gain access to the MD8412B
in the unit of data stream to be transferred, not in the concept of packets.
For transmission in the auto-mode, the number of channels is limited to one. For reception, the number of channels is limited
to two at the maximum. For data transfer with more channels, it is always carried out in the normal mode.
For transmission, the host makes necessary information setting in advance in the header part of the isochronous packet in the
isochronous configuration register. The MD8412B generates a header based on the contents of this register.
5-4-1
Length control
The data in the ITF are converted into a packet in the unit of length set in the isochronous packet length register, and this
packet is transmitted with the timing of each cycle start. The value of this register is used as the DataLength field in the iso-
chronous packet header.
If the data in the ITF are not enough for the value of length set at the timing of a certain cycle start, the MD8412B does
not perform transmission at that timing, but waits for the next transmission until the data amounting to the required length
are accumulated in the buffer. In this case, this condition is announced to the host with the ITNoTx bit in the Interrupt reg-
ister.
The isochronous packet length register is set in the unit of bytes. However, if setting is made in the isochronous packet
length register not in the unit of Quadlet but in the unit of effective bits for the lower two bits, the MD8412B rounds up this
value to the Quadlet value required for transmission. As described above, if each packet makes data setting in the isochro-
nous packet length register not in the Quadlet unit, it is then necessary for the host side to write the data in the ITF, for
which padding treatment has been finished so that the Quadlet unit becomes available.
5-4-2
Transmission start / stop control
The ITSTART terminal and the ITStart bit in the TGO register are used during transmission in the auto-mode, so that
information about the start of packet transmission can be sent to the MD8412B. When the ITSTART terminal and the
ITStart bit are asserted, the MD8412B begins to perform transmission for the packet length that is preset in the isochronous
packet length register, starting with the start packet that has been placed shortly after the above-mentioned assertion. When
the ITSTART terminal and the ITStart bit are negated, the MD8412B then performs transmission of one packet shortly
after the placement of the start packet and stops further transmission.
The relationship between the ITSTART terminal and the ITStart bit is expressed by a logical sum (OR). Therefore, oper-
ation can be issued from the system to either hardware set or software set. At the ITSTART terminal, transmission is
started with a transition from the "0" to "1" level, and stopped with another transition from the "1" to "0" level. Similarly as
for the ITStart bit, transmission is started with the writing of "1" and stopped with another writing of "0".
5-4-3
Sync control
During transmission, the MD8412B can insert three types of codes in the synchronization code field of the isochronous
header. During reception, it can perform reception control based on the contents of the synchronization code field.
When the SyncEn bit is "0" in the isochronous configuration register, contents of the setting value of the Sync register in
that register are entered in the synchronization code field in the packet header at any time.
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