
MD8412B
Ver 1.10
FUJIFUILM MICRODEVICES CO., LTD.
ix
Table 4-7-7
List of Acknowledge Codes (Ack)........................................................................................................................53
Table 5-1-2
Little / Big Endian Mode.......................................................................................................................................55
Table 5-1-1
Valid Host Data Bus Accessed from the Host.......................................................................................................55
Table 5-1-3
DREQ Signal Assert / Negate Conditions.............................................................................................................56
Table 5-2-1
PHY-Chip Control Mode 1....................................................................................................................................59
Table 5-2-2
PHY-Chip Control Mode 2....................................................................................................................................59
Table 5-2-3
Request Format......................................................................................................................................................60
Table 5-2-4
Speed Format.........................................................................................................................................................60
Table 5-2-5
Read Register Format............................................................................................................................................61
Table 5-2-6
Write Register Format ...........................................................................................................................................61
Table 5-2-7
Acceleration Control Format.................................................................................................................................61
Table 5-2-8
Request Type.........................................................................................................................................................61
Table 5-2-9
Status Request Format...........................................................................................................................................62
Table 5-2-10
LPS output.............................................................................................................................................................66
Table 5-2-11
LPS Output Characteristics in AC Connection .....................................................................................................66
Table 5-7-1
Status of Interrupt and FIFO during ARF Reception ............................................................................................83
Table 5-7-2
Status of Interrupt and FIFO during IRF, TF/IRF Reception................................................................................88
Table 5-8-1
Asynchronous Stream Transmit format.................................................................................................................89
Table 5-8-2
Asynchronous Stream Receive format ..................................................................................................................89
Table 6-4-1
Host Interface AC Characteristics.........................................................................................................................93
Table 6-4-2
PHY AC Characteristics........................................................................................................................................96