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參數(shù)資料
| 型號： | MD8412B |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | LINK(IEEE 1394) |
| 中文描述： | 鏈接（1394） |
| 文件頁數(shù)： | 42/114頁 |
| 文件大?。?/td> | 577K |
| 代理商： | MD8412B |
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MD8412B
30
FUJIFUILM MICRODEVICES CO., LTD.
Ver 1.10
Bit 11
AckErr
: Ack Error bit (RW- Initial value: 0b)
Set at "1" for a transmitted asynchronous packet, if an Acknowledge packet returned from the destination
node cannot be normally received.
Bit 12
PhyRegRcvd
: PHY Register Received bit (RW- Initial value: 0b)
Set at "1" when data from PHY are stored in RegData after the issuing of a Read request toward the PHY reg-
ister.
Bit 13
BusResetFin
: Bus Reset Finish Bit (RW- Initial value: 0b)
This bit is set at "1" when bus reset is finished and SubactionGap is detected.
Bit 14
BusReset
: Bus Reset bit (RW- Initial value: 0b)
Set at "1" when PHY is turned in bus reset mode.
Bit 15
PhyInt
: Phy Interrupt bit (RW- Initial value: 0b)
Set at "1" when an interrupt factor is sent from PHY connected to MD8412B.
Bit 16ITF/IRFFlush: ITF/IRF Flush bit (RW- Initial value: 0b)
Set at "1" when MD8412B makes isochronous reception, but a packet routed to the IFT/IRF buffer cannot be
normally received for the following reasons, thus causing the received data canceled:
Bit 17
IRFFlush
: IRF Flush bit (RW- Initial value: 0b)
Set at "1" when MD8412B makes isochronous reception, but a packet routed to the IRF buffer cannot be nor-
mally received for the following reasons, thus causing the received data canceled:
Bit 18
ITNoTx
: Isochronous No Transmit bit (RW- Initial value: 0b)
Set at "1" during isochronous transmission by MD8412B in auto-mode, if this transmission cannot be accom-
plished after reception of the Cycle Start packet.
Bit 19
ITxEnd
: Isochronous Transmit End bit (RW- Initial value: 0b)
Set at "1" when isochronous transmission is attempted by MD8412B in normal mode, and a group of packets
has been completely transferred for different channels required to be transferred by ITGo.
Bit 20
ARxEnd
: Asynchronous Receive End bit (RW- Initial value: 0b)
Set at "1" when asynchronous reception is performed by MD8412B and data are stored in the ARF buffer.
Bit 21
ITF/IRFRxEnd
: Isochronous Receive End (ITF/IRF) bit (RW- Initial value: 0b)
Set at "1" when isochronous reception is performed by MD8412B and data are stored in the IFT/IRF buffer.
Bit 22
IRFRxEnd
: Isochronous Receive End (IRF) bit (RW- Initial value: 0b)
Set at "1" when isochronous reception is performed by MD8412B and data are stored in the IRF buffer.
Bit 23
ATxEnd
: Asynchronous Transmit End bit (RW- Initial value: 0b)
Set at "1" when asynchronous transmission is performed by MD8412B and an Ack code returned from the
destination is received upon completion of transmission operation. This bit is also set at "1" when retry opera-
tion is performed and its retry phase is completed, or when AckErr is set in the middle of operation.
Bit 24
ARFFlush
: ARF Flush bit (RW- Initial value: 0b)
When the MD8412B performs asynchronous reception and the packet routed to the ARF buffer cannot be
received normally for the reasons specified below, this bit is set at "1" if the received data are flushed as a result.
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