參數(shù)資料
型號(hào)： MD8412B
廠商： Electronic Theatre Controls, Inc.
英文描述： LINK(IEEE 1394)
中文描述： 鏈接（1394）
文件頁數(shù)： 45/114頁
文件大?。?/td> 577K
代理商： MD8412B
MD8412B
Ver 1.10
FUJIFUILM MICRODEVICES CO., LTD.
33
3-2-23 AtRetries Register
Index
68h
Initial value
00C8 0000h
When an asynchronous packet is transmitted from the node of the MD8412B and a busy acknowledge signal is returned
from the destination node, the MD8412B automatically functions to make a retry action. The number of retries and the
time are set in this register. Once in the retry phase, the busy flag of the ATGo register is never negated until an acknowl-
edge signal other than busy is returned from the destination node or the preset number of retries and time are exceeded.
Therefore, the next packet transmission is impossible in this state. It is, however, possible to perform the forced ending of
the retry phase if the RetryStop bit is used.
This register is used to set up the duration of a retry upon the reception of a busy acknowledge signal sent from the desti-
nation node. The retry phase used to see this register value is the dual phase. If the retry phase cannot be finished within the
preset time period, the retry time-out status flag is presented in the ATAck register to complete the retry phase that is to be
executed by the MD8412B. Since then, the packet data in the ATF buffer are flushed. The maximum value that can be set
is within 8 seconds. If "0" is set in this field, the MD8412B automatically sets itself not to perform a dual phase retry. In
such a case, the packet data to the busy acknowledge signal are flushed. Also, when an error acknowledge signal is
returned in the middle of a retry phase, this retry is suspended at that time point and the buffer is flushed to complete the
retry by presenting a flag (AckErr).
Bit 12~0
RetryCycleLimit
: Retry Cycle Limit Bit (R- Initial value: 0000h)
In the dual retry phase, the MD8412B indicates the present retry lapse time in the Cycle unit.
Bit 15~13
RetrySecond/Limit
: Retry Second Limit Bit (R-Initial Value: 0h)
In the dual retry phase, the MD8412B indicates the present retry lapse time in the Second unit.
Bit 16~28
MaxRetryCycleLimit
: Maximum Retry Cycle Limit Bit (RW- Initial Value: 00C8h)
This area is used for the specified values in the Cycle unit. It is effective within the range of 0 to 7999.
Bit 29~31
MaxRetrySecondLimit
: Maximum Retry Second Limit Bit (RW- Initial Value: 0000h)
This area is used for the specified valued in the Second unit.
7
6
5
4
3
2
1
0
RetryCycleLimit
15
14
13
12
11
10
9
8
RetrySecondLimit
RetryCycleLimit
23
22
21
20
19
18
17
16
MaxRetryCycleLimit
31
30
29
28
27
26
25
24
MaxRetryCycleLimit
RetryCycleLimit
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