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參數(shù)資料
| 型號(hào)： | MC68HC05CJ4FB |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | QFP-44 |
| 文件頁(yè)數(shù)： | 97/114頁(yè) |
| 文件大?。?/td> | 361K |
| 代理商： | MC68HC05CJ4FB |
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GENERAL RELEASE SPECIFICATION
MC68HC(7)05CJ4
TIMER 1
MOTOROLA
Rev. 2.1
11-7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
11.6 Timer 1 Status Register (T1SR)
The T1SR is a read-only register containing three status flag bits.
ICF — Input Capture Flag
1 = Flag set when selected polarity edge is sensed by input capture edge
detector
0 = Flag cleared when T1SR and input capture low register ($15) are
accessed
OCF — Output Compare Flag
1 = Flag set when output compare register contents match the free-running
counter contents
0 = Flag cleared when T1SR and output compare low register ($17) are
accessed
TOF — Timer Overflow Flag
1 = Flag set when free-running counter transition from $FFFF to $0000
occurs
0 = Flag cleared when T1SR and counter low register ($19) are accessed
Bits 0:4 — Not used and always read as zero
NOTE
Status of ICF, OCF, and TOF flag bits are undefined after reset.
Accessing the timer 1 status register satisfies the first condition required to clear
status bits. The remaining step is to access the register corresponding to the status
bit.
Bit 7
654321
Bit 0
$0013
T1SR
Read:
ICF
OCF
TOF
00000
Write:
Reset:
X
00000
= Unimplemented
X = Undened
Figure 11-5. Timer 1 Status Register
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相關(guān)代理商/技術(shù)參數(shù) |
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| MC68HC05CT4FB | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification |
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| MC68HC05E0FN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
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