參數(shù)資料
型號(hào): MC68HC05CJ4FB
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44
封裝: QFP-44
文件頁(yè)數(shù): 73/114頁(yè)
文件大?。?/td> 361K
代理商: MC68HC05CJ4FB
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)當(dāng)前第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)
GENERAL RELEASE SPECIFICATION
MOTOROLA
SERIAL PERIPHERAL INTERFACE
MC68HC(7)05CJ4
9-4
Rev. 2.1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
9.3 SPI Registers
The following subsections describe the SPI registers.
9.3.1 SPI Control Register (SPCR)
Read: anytime
Write: anytime
SPIE — SPI Interrupt Enable
When this bit is set to a one a hardware interrupt sequence is requested each
time the SPIF or MODF status flag is set. SPI interrupts are inhibited if this bit is
clear or if the I bit in the condition code register is one.
SPE — SPI System Enable
When the SPE bit is set the port D bits 2, 3, 4, and 5 are dedicated to the SPI
function.
DOD — Direction Of Data
This bit determines the direction of data flow in or out of the serial shift register.
When set, data is transferred LSB first. When cleared (the default state), data is
transferred MSB first.
NOTE
Figure 9-2 assumes a value of zero for this bit.
MSTR — Master/Slave Mode Select
0 = Slave mode
1 = Master mode
Bit 7
654321
Bit 0
$000A
SPCR
Read:
SPIE
SPE
DOD
MSTR
CPOL
CPHA
SPR1
SPR0
Write:
Reset:
0000
UUUU
U = Unaffected
Figure 9-1. SPI Control Register
相關(guān)PDF資料
PDF描述
MC68HC05CL48 8-BIT, MROM, 1.802 MHz, MICROCONTROLLER, PQFP112
MC68HC705CL48 8-BIT, OTPROM, 1.802 MHz, MICROCONTROLLER, PQFP112
MC68HC05CT4FN 8-BIT, MROM, 2.048 MHz, MICROCONTROLLER, PQCC44
MC68HC05CT4FB 8-BIT, MROM, 2.048 MHz, MICROCONTROLLER, PQFP44
MC68HC05E16CB 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP56
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC68HC05CT4FB 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification
MC68HC05CT4FN 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification
MC68HC05D9 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8-bit microcomputer with PWM outputs and LED drive
MC68HC05E0 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit
MC68HC05E0FN 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller