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參數(shù)資料
| 型號： | MC68HC05CJ4FB |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | QFP-44 |
| 文件頁數(shù)： | 30/114頁 |
| 文件大?。?/td> | 361K |
| 代理商： | MC68HC05CJ4FB |
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GENERAL RELEASE SPECIFICATION
MOTOROLA
CPU CORE
MC68HC(7)05CJ4
3-2
Rev. 2.1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
3.4 Program Counter (PC)
The program counter is a 16-bit register that contains the address of the next byte
to be fetched.
3.4.1 Stack Pointer (SP)
The stack pointer contains the address of the next free location on the stack.
During an MCU reset or the reset stack pointer (RSP) instruction, the stack pointer
is set to location $00FF. The stack pointer is then decremented as data is pushed
onto the stack and incremented as data is pulled from the stack.
When accessing memory, the 10 most significant bits are permanently set to
0000000011. These 10 bits are appended to the six least significant bits to produce
an address within the range of $00FF to $00C0. Subroutines and interrupts may
use up to 64 (decimal) locations. If 64 locations are exceeded, the stack pointer
wraps around and loses the previously stored information. A subroutine call
occupies two locations on the stack; an interrupt uses five locations. See Figure
3-2 for more information.
Figure 3-2. Stacking Order
NOTE
Since the stack pointer decrements during pushes, the program
counter low (PCL) is stacked first, followed by program counter high
(PCH), etc. Pulling from the stack is in the reverse order.
INDEX REGISTER
PCL
ACCUMULATOR
CONDITION CODE REGISTER
PCH
11
1
70
STACK
I
N
T
E
R
U
P
T
DECREASING
UNSTACK
R
E
T
U
R
N
INCREASING
MEMORY
ADDRESSES
MEMORY
ADDRESSES
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| MC68HC05CT4FB | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification |
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