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參數(shù)資料
| 型號(hào)： | MC68HC05CJ4FB |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | QFP-44 |
| 文件頁(yè)數(shù)： | 66/114頁(yè) |
| 文件大?。?/td> | 361K |
| 代理商： | MC68HC05CJ4FB |
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GENERAL RELEASE SPECIFICATION
MOTOROLA
SERIAL COMMUNICATIONS INTERFACE
MC68HC(7)05CJ4
8-18
Rev. 2.1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
SBK — Send Break
To generate a break code (at least 10 or 11 contiguous zeros), a one is written
into this bit. As long as SBK remains set to a one, the transmitter will send zeros.
If SBK is toggled on and off, the transmitter will send only 10 (or 11) zeros and
then revert to mark idle or sending data.
8.4.4 SCI Status Register (SCSR)
The bits in this register are set by various conditions in the SCI hardware and are
automatically cleared by special acknowledge sequences. The receive-related flag
bits in SCSR (RDRF, IDLE, OR, NF, and FE) are all cleared by a read of the SCSR
register followed by a read of the Transmit/Receive Data Register. However, only
those bits which were set when SCSR was read will be cleared by the subsequent
read of the Transmit/Receive Data Register. The transmit-related bits in SCSR
(TDRE and TC) are cleared by a read of the SCSR register followed by a write to
the Transmit/Receive Data Register.
Read: anytime (used in auto clearing mechanism)
Write: has no meaning or effect
TDRE — Transmit Data Register Empty Flag
This bit is set when the byte in the transmit data register is transferred to the
serial shift register. New data will not be transmitted unless the SCSR register
is read before writing to the transmit data register. Reset sets this bit.
TC — Transmit Complete Flag
This bit is set to indicate that the SCI transmitter has no meaningful information
to transmit (no data in shifter, no preamble, no break). When TC is set, the serial
line will go idle (continuous mark). Reset sets this bit.
RDRF — Receive Data Register Full Flag
This bit is set when the contents of the receiver serial shift register is transferred
to the receiver data register.
Bit 7
654321
Bit 0
$0010
SCSR
Read:
TDRE
TC
RDRF
IDLE
OR
NF
FE
0
Write:
Reset:
11000000
= Unimplemented
Figure 8-11. SCI Status Register
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相關(guān)代理商/技術(shù)參數(shù) |
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| MC68HC05CT4FB | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification |
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| MC68HC05E0 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit |
| MC68HC05E0FN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
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