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參數(shù)資料
| 型號(hào)： | MC68HC05CJ4FB |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | QFP-44 |
| 文件頁數(shù)： | 37/114頁 |
| 文件大?。?/td> | 361K |
| 代理商： | MC68HC05CJ4FB |
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GENERAL RELEASE SPECIFICATION
MC68HC(7)05CJ4
RESETS
MOTOROLA
Rev. 2.1
5-1
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SECTION 5
RESETS
5.1 Introduction
The MCU can be reset two ways: by the initial power-on reset function or by an
active low input to the RESET pin. See Figure 5-1.
5.2 Power-On Reset (POR)
An internal reset is generated on power-up to allow the internal clock generator to
stabilize. The power-on reset is strictly for power turn-on conditions and should not
be used to detect a drop in the power supply voltage. There is a 4064 internal
processor clock cycle (tcyc) oscillator stabilization delay after the oscillator
becomes active.
If the RESET pin is low at the end of this 4064 cycle delay, the MCU will remain in
the reset condition until RESET goes high.
5.3 RESET Pin
The MCU is reset when a logic zero is applied to the RESET input for a period of
one and one-half machine cycles (tcyc).
5.4 Computer Operating Properly (COP) Reset
The MCU contains a watchdog timer that automatically times out if not reset
(cleared) within a specific time by a program reset sequence. If the COP watchdog
timer is allowed to time-out, an internal reset is generated to reset the MCU.
Because the internal RESET signal is used, the MCU comes out of a COP reset in
the same operating mode it was in when the COP time-out was generated.
The COP reset function is a software programmable option.
Refer to 12.4 COP Watchdog Reset for more information on the COP.
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