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參數(shù)資料
| 型號： | MC68HC05CJ4FB |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | QFP-44 |
| 文件頁數(shù)： | 42/114頁 |
| 文件大?。?/td> | 361K |
| 代理商： | MC68HC05CJ4FB |
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GENERAL RELEASE SPECIFICATION
MC68HC(7)05CJ4
MODES OF OPERATION
MOTOROLA
Rev. 2.1
6-3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
6.5.1 Stop Mode
The STOP instruction places the MCU in its lowest power consumption mode. In
stop mode, the internal oscillator is turned off, halting all internal processing,
including timer operation.
During the stop mode, the TCSR (timer 2) bits are altered to remove any pending
timer interrupt request and to disable any further timer interrupts. The I bit in the
CCR is cleared to enable external interrupts. All other registers and memory
remain unaltered. All input/output lines remain unchanged. The processor can be
brought out of the stop mode only by an external interrupt or reset.
6.5.2 Stop Recovery
The processor can be brought out of the stop mode only by an external interrupt or
RESET.
Figure 6-2. Stop Recovery Timing Diagram
6.5.3 Wait Mode
The WAIT instruction places the MCU in a low-power consumption mode, but the
wait mode consumes more power than the stop mode. All CPU action is
suspended, but the timers and the oscillator remain active. Any interrupt or reset
will cause the MCU to exit the wait mode.
1FFE
1FFF
INTERNAL
ADDRESS
BUS
INTERNAL
CLOCK
IRQ
3
IRQ
2
RESET
OSC1
1
RESET OR INTERRUPT
VECTOR FETCH
NOTES:
1. Represents the internal gating of the OSC1 pin.
2. IRQ pin edge-sensitive software option.
3. IRQ pin level and edge-sensitive software option.
t
RL
4064 t
CYC
tILCH
t
LH
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