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參數(shù)資料
| 型號： | MC68HC05CJ4FB |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | QFP-44 |
| 文件頁數(shù)： | 45/114頁 |
| 文件大?。?/td> | 361K |
| 代理商： | MC68HC05CJ4FB |
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GENERAL RELEASE SPECIFICATION
MOTOROLA
INPUT/OUTPUT PORTS
MC68HC(7)05CJ4
7-2
Rev. 2.1
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7.5 Port D
Port D is an 8-bit fixed input port. Four of its pins are shared with the SPI
subsystem, two are shared with the I2C subsystem and two more are shared with
the SCI subsystem. During reset, all eight bits become valid input ports because
all special function output drivers associated with the SCI, I2C and SPI subsystems
are disabled.
7.6 Input/Output Programming
Port pins for ports A, B, and C may be programmed as inputs or outputs under
software control. The direction of the pins is determined by the state of the
corresponding bit in the port data direction register (DDR). Ports A, B, and C have
an associated DDR. Any I/O port pin is configured as an output if its corresponding
DDR bit is set to a logic one. A pin is configured as an input if its corresponding
DDR bit is cleared to a logic zero.
At power-on or reset, all DDRs are cleared, which configures all pins as inputs. The
data direction registers are capable of being written to or read by the processor.
During the programmed output state, a read of the data register actually reads the
value of the output data latch and not the I/O pin. For further information see Table
7-1 and Figure 7-1.
Table 7-1. I/O Pin Functions
R/W
DDR
I/O Pin Function
0
The I/O pin is in input mode. Data is written into the output data latch.
0
1
Data is written into the output data latch and output to the I/O pin.
1
0
The state of the I/O pin is read.
1
The I/O pin is in an output mode. The output data latch is read.
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