- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄45219 > MC68HC05CJ4FB (MOTOROLA INC) 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44 PDF資料下載
參數(shù)資料
| 型號： | MC68HC05CJ4FB |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | QFP-44 |
| 文件頁數(shù)： | 59/114頁 |
| 文件大?。?/td> | 361K |
| 代理商： | MC68HC05CJ4FB |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁當(dāng)前第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁
GENERAL RELEASE SPECIFICATION
MOTOROLA
SERIAL COMMUNICATIONS INTERFACE
MC68HC(7)05CJ4
8-12
Rev. 2.1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
8.3.3 Idle Line Detect
The receive logic hardware includes the ability to detect an idle line. This can be
useful in a system to indicate when one message was finished and another was
about to be started. An idle line is defined as a minimum of 10 (11 if nine data bit
format is selected) bit times of continuous logic ones on the RXD line. During a
normal message, there is no idle time between frames, so even if all information
bits in a frame were logic ones the start bits would ensure that at least one logic
zero bit time occurred for each frame and IDLE would not get set.
When the RXD line goes idle for the minimum required time, the IDLE status bit in
SCSR gets set. If the Idle Line Interrupt Enable (ILIE) bit in the SCCR1 register is
set then a hardware interrupt sequence also will be requested when IDLE gets set.
The IDLE status bit is cleared by reading the SCSR register (with IDLE set)
followed by reading the RDR register. IDLE will not be set again until after at least
one character is received. This prevents an RXD line that remains idle for a long
period of time from causing several interrupts.
8.3.4 Receiver Wakeup
The receiver logic hardware also supports a receiver wake-up function intended for
systems having more than one receiver. With this function, the transmitting device
directs messages to an individual receiver or group of receivers by passing
addressing information as the initial byte(s) of each message. Receivers not
addressed invoke the receiver wake up function which puts these receivers in a
dormant state for the remainder of the unwanted message. This eliminates any
further software overhead to service the remaining characters of the unwanted
message and thus improves performance.
The receiver is placed in wake-up mode by writing a one to the receiver wake-up
(RWU) bit in the SCCR2 register. While RWU is set, all of the receive status flags
(RDRF, IDLE, OR, NF, and FE) are inhibited (cannot be set). Note that
specification of receiver wake-up mode inhibits the use of the idle line detect
function. Although RWU may be cleared by a write to SCCR, it is normally left alone
by software and gets cleared automatically by hardware with one of the two
methods explained in the following paragraphs.
The SCI offers a choice of two methods for waking up receivers from the dormant
state. The first method is called idle line wake up. The second method is called
address mark wake up and operates by using the MSB to differentiate between
address information (MSB set) and data information (MSB clear). The WAKE
control bit in the SCCR1 control register is used to select which method of
automatic hardware wake up is to be used. If the WAKE bit is clear, Idle Line wake
up is specified and if WAKE is set to one, address mark wake up is selected.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC68HC05CL48 | 8-BIT, MROM, 1.802 MHz, MICROCONTROLLER, PQFP112 |
| MC68HC705CL48 | 8-BIT, OTPROM, 1.802 MHz, MICROCONTROLLER, PQFP112 |
| MC68HC05CT4FN | 8-BIT, MROM, 2.048 MHz, MICROCONTROLLER, PQCC44 |
| MC68HC05CT4FB | 8-BIT, MROM, 2.048 MHz, MICROCONTROLLER, PQFP44 |
| MC68HC05E16CB | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP56 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC05CT4FB | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification |
| MC68HC05CT4FN | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification |
| MC68HC05D9 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8-bit microcomputer with PWM outputs and LED drive |
| MC68HC05E0 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit |
| MC68HC05E0FN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。