參數(shù)資料
型號: K4N56163QF-GC
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 256Mbit gDDR2 SDRAM
中文描述: 片256Mbit GDDR2 SDRAM的
文件頁數(shù): 48/73頁
文件大?。?/td> 1262K
代理商: K4N56163QF-GC
- 48 -
Rev 1.6 (Apr. 2005)
256M gDDR2 SDRAM
K4N56163QF-GC
Precharge Command
The Precharge Command is used to precharge or close a bank that has been activated. The Precharge Command is trig-
gered when CS, RAS and WE are low and CAS is high at the rising edge of the clock. The Precharge Command can be
used to precharge each bank independently or all banks simultaneously. Three address bits A10, BA0 and BA1 for
256Mb are used to define which bank to precharge when the command is issued.
Bank Selection for Precharge by Address Bits
Burst Read Operation Followed by Precharge
Minimum Read to precharge command spacing to the same bank = AL + BL/2 clocks.
For the earliest possible precharge, the precharge command may be issued on the rising edge which is “Additive
latency(AL) + BL/2 clocks” after a Read command. A new bank active (command) may be issued to the same bank after
the RAS precharge time (t
RP
). A precharge command cannot be issued until t
RAS
is satisfied.
The minimum Read to Precharge spacing has also to satisfy a minimum analog time from the rising clock edge that ini-
tiates the last 4-bit prefetch of a Read to Precharge command. This time is called tRTP (Read to Precharge). For BL = 4
this is the time from the actual read (AL after the Read command) to Precharge command. For BL = 8 this is the time from
AL + 2 clocks after the Read to the Precharge command.
A10
BA1
BA0
Precharged
Bank(s)
Remarks
LOW
LOW
LOW
Bank 0 only
LOW
LOW
HIGH
Bank 1 only
LOW
HIGH
LOW
Bank 2 only
LOW
HIGH
HIGH
Bank 3 only
HIGH
DON’T CARE
DON’T CARE
All Banks
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