- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373065 > K4N56163QF-GC (SAMSUNG SEMICONDUCTOR CO. LTD.) 256Mbit gDDR2 SDRAM PDF資料下載
參數(shù)資料
| 型號： | K4N56163QF-GC |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 256Mbit gDDR2 SDRAM |
| 中文描述： | 片256Mbit GDDR2 SDRAM的 |
| 文件頁數(shù)： | 38/73頁 |
| 文件大?。?/td> | 1262K |
| 代理商： | K4N56163QF-GC |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁當前第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁
- 38 -
Rev 1.6 (Apr. 2005)
256M gDDR2 SDRAM
K4N56163QF-GC
Burst Mode Operation
Burst mode operation is used to provide a constant flow of data to memory locations (write cycle), or from memory loca-
tions (read cycle). The parameters that define how the burst mode will operate are burst sequence and burst length.
gDDR2 SDRAM supports 4 bit burst and 8 bit burst modes only. For 8 bit burst mode, full interleave address ordering is
supported, however, sequential address ordering is nibble based for ease of implementation. The burst type, either
sequential or interleaved, is programmable and defined by the address bit 3 (A3) of the MRS, which is similar to the DDR
SDRAM operation. Seamless burst read or write operations are supported. Unlike DDR devices, interruption of a burst
read or write cycle during BL = 4 mode operation is prohibited. However in case of BL = 8 mode, interruption of a burst
read or write operation is limited to two cases, reads interrupted by a read, or writes interrupted by a write. Therefore the
Burst Stop command is not supported on gDDR2 SDRAM devices.
Burst Length and Sequence
BL = 4
BL = 8
Note: Page length is a function of I/O organization and column addressin
Burst Length
Starting Address (A1 A0)
Sequential Addressing (decimal)
Interleave Addressing (decimal)
4
0 0
0, 1, 2, 3
0, 1, 2, 3
0 1
1, 2, 3, 0
1, 0, 3, 2
1 0
2, 3, 0, 1
2, 3, 0, 1
1 1
3, 0, 1, 2
3, 2, 1, 0
Burst Length
Starting Address (A2 A1 A0)
Sequential Addressing (decimal)
Interleave Addressing (decimal)
8
0 0 0
0, 1, 2, 3, 4, 5, 6, 7
0, 1, 2, 3, 4, 5, 6, 7
0 0 1
1, 2, 3, 0, 5, 6, 7, 4
1, 0, 3, 2, 5, 4, 7, 6
0 1 0
2, 3, 0, 1, 6, 7, 4, 5
2, 3, 0, 1, 6, 7, 4, 5
0 1 1
3, 0, 1, 2, 7, 4, 5, 6
3, 2, 1, 0, 7, 6, 5, 4
1 0 0
4, 5, 6, 7, 0, 1, 2, 3
4, 5, 6, 7, 0, 1, 2, 3
1 0 1
5, 6, 7, 4, 1, 2, 3, 0
5, 4, 7, 6, 1, 0, 3, 2
1 1 0
6, 7, 4, 5, 2, 3, 0, 1
6, 7, 4, 5, 2, 3, 0, 1
1 1 1
7, 4, 5, 6, 3, 0, 1, 2
7, 6, 5, 4, 3, 2, 1, 0
相關PDF資料 |
PDF描述 |
|---|---|
| K4N56163QF-GC25 | 256Mbit gDDR2 SDRAM |
| K4N56163QF-GC30 | 256Mbit gDDR2 SDRAM |
| K4N56163QF-GC37 | 256Mbit gDDR2 SDRAM |
| K4PE68A | Transient Voltage Suppressor Diodes |
| K4R271669A | 256K x 16/18 bit x 2*16 Dependent Banks Direct RDRAMTM |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| K4N56163QF-GC25 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256Mbit gDDR2 SDRAM |
| K4N56163QF-GC30 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256Mbit gDDR2 SDRAM |
| K4N56163QF-GC37 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256Mbit gDDR2 SDRAM |
| K4N56163QG-ZC2A | 制造商:Samsung Semiconductor 功能描述: |
| K4P24V3 | 制造商:AROMAT 功能描述:REPLAY 700 OHM |
發(fā)布緊急采購，3分鐘左右您將得到回復。