參數(shù)資料
型號: K4N56163QF-GC
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 256Mbit gDDR2 SDRAM
中文描述: 片256Mbit GDDR2 SDRAM的
文件頁數(shù): 11/73頁
文件大小: 1262K
代理商: K4N56163QF-GC
- 11 -
Rev 1.6 (Apr. 2005)
256M gDDR2 SDRAM
K4N56163QF-GC
DC CHARACTERISTICS
(Recommended operating conditions unless otherwise noted,
0
°
C
Tc
≤85°
C
)
Note : 1. Measured with outputs open and ODT off
2. Refresh period is 32ms
Parameter
Symbol
Test Condition
Version
Unit
- 25
- 30
- 37
Operating Current
(One Bank Active)
I
CC1
Burst Length=4
t
RC
t
RC
(min).
I
OL
=0mA,
t
CC
=
t
CC
(min).
DQ,DM,DQS inputs changing twice per clock cycle.
Address and control inputs changing once per clock
cycle
150
135
120
mA
Precharge Standby Current
in Power-down mode
I
CC2
P
CKE
V
IL
(max),
t
CC
=
t
CC
(min)
10
mA
Precharge Standby Current
in Non Power-down mode
I
CC2
N
CKE
V
IH
(min), CS
V
IH
(min),
t
CC
=
t
CC
(min)
Address and control inputs changing once per clock
cycle
45
45
40
mA
Active Standby Current
power-down mode
I
CC3
P
CKE
V
IL
(max),
t
CC
=
t
CC
(min)
50
50
50
mA
Active Standby Current in
in Non Power-down mode
I
CC3
N
CKE
VIH(min), CS
VIH(min),
t
CC
=
t
CC
(min)
DQ,DM,DQS inputs changing twice per clock cycle.
Address and control inputs changing once per clock
cycle
85
85
80
mA
Operating Current
( Burst Mode)
I
CC4
I
OL
=0mA ,
t
CC
=
t
CC
(min),
Page Burst, All Banks activated. DQ,DM,DQS inputs
changing twice per clock cycle. Address and control
inputs changing once per clock.
300
280
260
mA
Refresh Current
I
CC5
t
RC
t
RFC
190
180
160
mA
Self Refresh Current
I
CC6
CKE
0.2V
10
mA
Operating Current
(4Bank interleaving)
I
CC7
Burst Length=4
t
RC
t
RC
(min).
I
OL
=0mA,
t
CC
=
t
CC
(min).
DQ,DM,DQS inputs changing twice per clock cycle.
Address and control inputs changing once per clock
cycle
430
400
350
mA
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