參數(shù)資料
型號(hào)： i960 VH
廠商： Intel Corp.
英文描述： Embedded-PCI Processor(嵌入式PCI處理器)
中文描述： 嵌入式PCI處理器（嵌入式處理器的PCI）
文件頁(yè)數(shù)： 4/64頁(yè)
文件大小： 851K
代理商： I960 VH
80960VH
4
Preliminary
Datasheet
5.0
Bus Functional Waveforms ..............................................................................................54
6.0
Device Identification On Reset.........................................................................................63
Figures
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16
Product Name Functional Block Diagram .............................................................8
80960JT Core Block Diagram.............................................................................10
324-Plastic Ball Grid Array Top and Side View...................................................25
324-Plastic Ball Grid Array (Top View)................................................................26
Thermocouple Attachment..................................................................................33
V
CC5
Current-Limiting Resistor ...........................................................................36
V
CCPLL
Lowpass Filter ........................................................................................36
AC Test Load ......................................................................................................44
P_CLK, TCLK Waveform ....................................................................................45
T
OV
Output Delay Waveform ..............................................................................45
T
OF
Output Float Waveform................................................................................46
T
IS
and T
IH
Input Setup and Hold Waveform......................................................46
T
LXL
and T
LXA
Relative Timings Waveform ........................................................46
DT/R# and DEN# Timings Waveform .................................................................47
I
2
C Interface Signal Timings................................................................................47
Fast Page-Mode Read Access, Non-Interleaved, 2,1,1,1 Wait State, 32-Bit 80960
Local Bus ............................................................................................................48
Fast Page-Mode Write Access, Non-Interleaved, 2,1,1,1 Wait States, 32-Bit 80960
Local Bus ............................................................................................................49
FPM DRAM System Read Access, Interleaved, 2,0,0,0 Wait States..................50
FPM DRAM System Write Access, Interleaved, 1,0,0,0 Wait States..................51
EDO DRAM, Read Cycle ....................................................................................52
EDO DRAM, Write Cycle ....................................................................................52
32-Bit Bus, SRAM Read Accesses with 0 Wait States .......................................53
32-Bit Bus, SRAM Write Accesses with 0 Wait States........................................53
Non-Burst Read and Write Transactions without Wait States, 32-Bit 80960 Local
Bus......................................................................................................................54
Burst Read and Write Transactions without Wait States, 32-Bit 80960
Local Bus ............................................................................................................55
Burst Write Transactions with 2,1,1,1 Wait States, 32-Bit 80960 Local Bus.......56
Burst Read and Write Transactions without Wait States, 8-Bit 80960 Local Bus57
Burst Read and Write Transactions with 1, 0 Wait States and Extra Tr State on
Read, 16-Bit 80960 Local Bus ............................................................................58
Bus Transactions Generated by Double Word Read Bus Request, Misaligned One
Byte From Quad Word Boundary, 32-Bit 80960 Local Bus.................................59
HOLD/HOLDA Waveform For Bus Arbitration ....................................................60
80960 Core Cold Reset Waveform .....................................................................61
80960 Local Bus Warm Reset Waveform...........................................................62
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