參數(shù)資料
型號(hào)： i960 VH
廠商： Intel Corp.
英文描述： Embedded-PCI Processor(嵌入式PCI處理器)
中文描述： 嵌入式PCI處理器（嵌入式處理器的PCI）
文件頁(yè)數(shù)： 3/64頁(yè)
文件大?。?/td> 851K
代理商： I960 VH
Preliminary
Datasheet
3
80960VH
Contents
1.0
About This Document.........................................................................................................7
1.1
Solutions960
Program.........................................................................................7
1.2
Terminology...........................................................................................................7
1.3
Additional Information Sources .............................................................................7
2.0
Functional Overview...........................................................................................................8
2.1
Key Functional Units .............................................................................................9
2.1.1
DMA Controller.........................................................................................9
2.1.2
Address Translation Unit..........................................................................9
2.1.3
Messaging Unit.........................................................................................9
2.1.4
Memory Controller....................................................................................9
2.1.5
Core and Peripheral Unit..........................................................................9
2.1.6
I2C Bus Interface Unit ..............................................................................9
2.2
i960
Core Features (80960JT) ..........................................................................10
2.2.1
Burst Bus................................................................................................11
2.2.2
Timer Unit...............................................................................................11
2.2.3
Priority Interrupt Controller .....................................................................11
2.2.4
Faults and Debugging ............................................................................11
2.2.5
On-Chip Cache and Data RAM..............................................................12
2.2.6
Local Register Cache.............................................................................12
2.2.7
Test Features .........................................................................................12
2.2.8
Memory-Mapped Control Registers .......................................................12
2.2.9
Instructions, Data Types and Memory Addressing Modes.....................13
3.0
Package Information ........................................................................................................15
3.1
Package Introduction...........................................................................................15
3.1.1
Functional Signal Definitions..................................................................15
3.1.2
324-Lead PBGA Package ......................................................................25
3.2
Package Thermal Specifications.........................................................................33
3.2.1
Thermal Specifications...........................................................................33
3.2.1.1 Ambient Temperature................................................................33
3.2.1.2 Case Temperature ....................................................................33
3.2.1.3 Thermal Resistance ..................................................................34
3.2.2
Thermal Analysis....................................................................................34
4.0
Electrical Specifications....................................................................................................35
4.1
V
CC5
Pin Requirements (V
DIFF
) ..........................................................................35
4.2
V
CCPLL
Pin Requirements...................................................................................36
4.3
DC Specifications................................................................................................37
4.4
AC Specifications ................................................................................................39
4.4.1
Relative Output Timings.........................................................................41
4.4.2
Memory Controller Relative Output Timings ..........................................41
4.4.3
Boundary Scan Test Signal Timings ......................................................43
4.4.4
I2C Interface Signal Timings ..................................................................44
4.5
AC Test Conditions .............................................................................................44
4.6
AC Timing Waveforms ........................................................................................45
4.7
Memory Controller Output Timing Waveforms....................................................48
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