參數(shù)資料
型號: HMS30C7202
廠商: HYNIX SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-bit ARM7TDMI RISC static CMOS CPU core
中文描述: 32-BIT, 82.944 MHz, RISC PROCESSOR, PBGA256
封裝: 17 X 17 MM, 1.40 MM HEIGHT, 1 MM PITCH, FBGA-256
文件頁數(shù): 92/161頁
文件大?。?/td> 973K
代理商: HMS30C7202
HMS30C7110
2003 MagnaChip Semiconductor Ltd. All Rights Reserved
Version 1.5
92
Table 2.47 Pause frame delay value
MAC0 Address :
1920_009C
MAC1 Address :
1920_109C
Bits
Access Default Description
31:16
0
Reserved
15:0
RW
0x0018 Delay value
2.6.2.26.
H_TX_BADDR (offset = 0xA0)
This register holds base address of a frame to be transmitted via high priority TX queue (single
entry).
Table 2.48 TX High Priority Queue Base Address
MAC0 Address :
1920_00A0
MAC1 Address :
1920_10A0
Bits
Access Default Description
31:0
RW
0
Base address of TX frame for high priority queue
2.6.2.27.
H_TX_LENGTH (offset = 0xA4)
This register holds length of a frame to be transmitted via high priority TX queue (single entry).
Table 2.49 TX High Priority Queue Length
MAC0 Address :
1920_00A4
MAC1 Address :
1920_10A4
Bits
Access Default Description
31:0
R/W
0
Length of TX frame for high priority queue
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