參數資料
型號: HMS30C7202
廠商: HYNIX SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-bit ARM7TDMI RISC static CMOS CPU core
中文描述: 32-BIT, 82.944 MHz, RISC PROCESSOR, PBGA256
封裝: 17 X 17 MM, 1.40 MM HEIGHT, 1 MM PITCH, FBGA-256
文件頁數: 111/161頁
文件大?。?/td> 973K
代理商: HMS30C7202
HMS30C7110
2003 MagnaChip Semiconductor Ltd. All Rights Reserved
Version 1.5
111
counter to recount.
2.8.1.4.
Timer Value 0~2
These registers show the current values of the down counter.
Table 2.72 Current Timer Value Register Bit Definition
Address :
1810_0014, 1810_0018, 1810_001C
Bits
Access Default Description
31: 0
RO
0
CTV (Current Timer Value)
This 32-bit field indicates the present value of internal down counter.
2.8.1.5.
INT SRC
This register has 3 timer interrupts that occur every time the counter reaches zero.
Table 2.73 Interrupt Source Register Bit Definition
Address :
1810_0020
Bits
Access Default Description
31: 3
0
Reserved
2
RW
0
Expire timer 2
This bit indicates that the channel 2 down counter reaches zero value.
1
RW
0
Expire timer 1
This bit indicates that the channel 1 down counter reaches zero value.
0
RW
0
Expire timer 0
This bit indicates that the channel 0 down counter reaches zero value.
2.8.1.6.
INT ENABLE
This register includes interrupt enable bits.
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