參數(shù)資料
型號: HMS30C7202
廠商: HYNIX SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-bit ARM7TDMI RISC static CMOS CPU core
中文描述: 32-BIT, 82.944 MHz, RISC PROCESSOR, PBGA256
封裝: 17 X 17 MM, 1.40 MM HEIGHT, 1 MM PITCH, FBGA-256
文件頁數(shù): 32/161頁
文件大小: 973K
代理商: HMS30C7202
HMS30C7110
2003 MagnaChip Semiconductor Ltd. All Rights Reserved
Version 1.5
32
2.1.
System Configuration
This section describes system memory map and power-up configuration of HMS30C7110.
2.1.1.
Power-up Configuration
The following table shows power-up configuration mapping based on mode configuration pins
(MODE, TESTSE).
Table 2.1 Power-up Configuration
MODE
TESTSE
Contents
0
0
Normal Operation
0
1
NANDTREE/BIST/PLL Test
1
0
Parallel Capture for ATPG
1
1
Scan Shift for ATPG
2.1.2.
System Memory Map
The system memory map can be one of the following two configurations:
1.
Memory Maps
A.
SDRAM_REMAP = 0
B.
SDRAM_REMAP = 1
Two different memory maps can be selected by one of MEMC (SDRAM) registers. Refer to MEMC
for details.
Note 1: This address range is repeated in 0x4000_0000 ~ 0x7FFF_FFFF, 0x8000_0000 ~
0xBFFF_FFFF, and 0xC000_0000 ~ 0xFFFF_FFFF.
Note 2: 0x0000_0000 ~ 0x7FFF_FFFF is cacheable area and 0x8000_0000 ~ 0xFFFF_FFFF is non-
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