參數(shù)資料
型號: HMS30C7202
廠商: HYNIX SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-bit ARM7TDMI RISC static CMOS CPU core
中文描述: 32-BIT, 82.944 MHz, RISC PROCESSOR, PBGA256
封裝: 17 X 17 MM, 1.40 MM HEIGHT, 1 MM PITCH, FBGA-256
文件頁數(shù): 149/161頁
文件大?。?/td> 973K
代理商: HMS30C7202
HMS30C7110
2003 MagnaChip Semiconductor Ltd. All Rights Reserved
Version 1.5
149
7:0
0x00
Reserved
2.13.1.17.
Retry time (Retry)
Table 2.122 Retry time register Bit Definition
Address :
1948_0008
Bits
Access Default Description
31:9
0x0
Reserved
8:4
RW
0x0
Access time
This 5-bit field is used for checking the latency of data.
If slave failed to make valid data by the access time, then it enter to
the target abort state.
If this value is zero, then there is no checking for the latency of data.
3:0
RW
0x0
Retry time
This 4-bit field is used for limiting the number of retry. If this value
is zero, then there is no limit for the retry.
7:0
0x00
Reserved
2.13.1.18.
Clk select (Csel)
Table 2.123 Clk select register Bit Definition
Address :
1948_000C
Bits
Access Default Description
31:1
0x0
Reserved
0
RW
0x0
Divid by 4
This 1-bit field controls the CardBus clock speed.
0 = System clock/2
1 = System clock/4
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