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參數(shù)資料
| 型號： | HDMP-1024 |
| 英文描述： | Low Cost Gigabit Rate Receive Chip Set with TTL I/Os(帶TTL輸入/輸出的低價格千兆位速率接收芯片) |
| 中文描述： | 低成本千兆速率接收芯片組配備TTL的I / O（帶的TTL輸入/輸出的低價格千兆位速率接收芯片） |
| 文件頁數(shù)： | 3/40頁 |
| 文件大小： | 363K |
| 代理商： | HDMP-1024 |
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3
Typical Applications
The HDMP-1022/1024 chipset
was designed for ease of use and
flexibility. This allows the
customer to tailor the use of this
product, through the configura-
tion of the link, based on his
specific system requirements and
application needs. Typical
applications range from backplane
serialization and bus extension to
digital video transmission.
Low latency bus extension of a 16
or 20 bit wide data bus may be
achieved using the standard
duplex configuration (see Figure
1d). In full duplex, the HDMP-
1022/1024 chipset handles all of
the issues of link startup, main-
tenance, and simple error
detection.
If the bus width is 32 or 40 bits
wide, the HDMP-1022/1024
chipset is capable of sending this
data frame as two separate frame
segments with the use of an
external mux and demux as
shown in Figure 1b. In this mode,
called Double Frame Mode, the
FLAG bit is used by the
transmitter and receiver to
indicate the first or second frame
segment (Figure 19). The HDMP-
1022/1024 chipset in Double
Frame Mode may also be
configured in full duplex to
achieve a 32/40 bit wide bus
extension.
For digital video transmission,
simplex links are more common.
The HDMP-1022/1024 chipset
can transmit 16 to 20 bits of
parallel data in standard or
broadcast simplex mode
(Figs. 1a, 1e). Additionally, 32 to
40 bit wide data can be
transmitted over a single line (in
Double Frame Mode) or two
parallel lines, as in Figure 1c.
Figure 1. Various Configurations Using the HDMP-1022/1024.
Tx
Rx
CLK
CLK
A) 16/20 BIT SIMPLEX TRANSMISSION
CLK
Tx
Rx
CLK
MUX
DEMUX
B) 32/40 BIT SIMPLEX TRANSMISSION
CLK
Tx
Rx
CLK
CLK
Tx
Rx
CLK
C) 32/40 BIT SIMPLEX TRANSMISSION
WITH HIGH CLOCK RATES
CLK
Tx
Rx
CLK
CLK
Rx
Tx
CLK
D) 16/20 BIT DUPLEX TRANSMISSION
CLK
Tx
Rx
CLK
E) SIMPLEX BROADCAST TRANSMISSION
Rx
CLK
Rx
CLK
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HDMP-1032 | 制造商:AGILENT 制造商全稱:AGILENT 功能描述:1.4 GBd Transmitter/Receiver Chip Set with CIMT Encoder/Decoder and Variable Data Rate |
| HDMP-1032A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:1.4 GBd Transmitter Chip with CIMT Encoder/Decoder and Variable Data Rate |
| HDMP-1034 | 制造商:AGILENT 制造商全稱:AGILENT 功能描述:1.4 GBd Transmitter/Receiver Chip Set with CIMT Encoder/Decoder and Variable Data Rate |
| HDMP-1034A | 制造商:HP 制造商全稱:Agilent(Hewlett-Packard) 功能描述:Transmitter/Receiver Chip Set |
| HDMP-1512 | 制造商:AGILENT 制造商全稱:AGILENT 功能描述:Fibre Channel Transmitter and Receiver Chipset |
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