參數(shù)資料
型號(hào)： HDMP-1024
英文描述： Low Cost Gigabit Rate Receive Chip Set with TTL I/Os(帶TTL輸入/輸出的低價(jià)格千兆位速率接收芯片)
中文描述： 低成本千兆速率接收芯片組配備TTL的I / O（帶的TTL輸入/輸出的低價(jià)格千兆位速率接收芯片）
文件頁(yè)數(shù)： 21/40頁(yè)
文件大?。?/td> 363K
代理商： HDMP-1024
21
Rx I/O Definition (cont’d.)
Name
M20SEL
Pin
30
Type
I-TTL
Signal
16 or 20 Bit Word Select:
When this signal is high, the link operates
in 20 Bit data reception mode. Otherwise, the link operates in 16 Bit
mode and data outputs D16-D19 are undefined.
No connection. This pin is not bonded internally.
NC
2
3
8
9
75
28
29
NC
This pin is bonded to an isolated pad and has no functionality.
SMRST0*
SMRST1*
I-TTL
State Machine Reset Inputs:
Each of these active-low input pins
reset the Rx state machine to the initial start-up state. This initiates
a complete PLL restart and handshake at both ends of the duplex
link. Normally, SMRST0* is connected to a power-up reset circuit
or a host system reset signal. The SMRST1* input is normally
connected to the Tx LOCKED output. The LOCKED signal holds the
state-machine in the start-up state until the Tx PLL is locked.
State Machine Status Outputs:
These outputs indicate the current
state-machine state. They are used to directly control the Tx ED,
Tx FF, Rx FDIS, and Rx ACTIVE lines.
Recovered Frame-rate Data Clock Output:
This output is the PLL
recovered frame rate clock. D0-D19, FLAG, DAV*, CAV*, FF, LINKRDY*,
and ERROR should all be latched on the rising edge of STRBOUT.
External VCO Replacement Test Clock:
When TCLKSEL is
enabled, this input is used in place of the normal VCO signal,
effectively disabling the PLL and allowing the user to provide an
external retiming clock for testing.
Enable Test Clock Input:
When this input is active, the TCLK,
TCLK* inputs are used in place of the normal VCO signal. This
feature is used for diagnostic purposes only.
Temperature Sense Diode:
Used during wafer and package test
only. It should be left open.
Power:
Normally 5.0 Volts. This power supply is used for all the
core logic other than the output drivers.
STAT0
STAT1
27
26
O-TTL
STRBOUT
35
O-TTL
TCLK
12
I-TTL
TCLKSEL
10
I-TTL
TEMP
TEMP*
V
CC
77
76
5
23
24
33
44
63
64
73
78
13
T
S
V
CC_HS
S
High Speed Supply:
Normally 5.0 Volts. This ground is used to provide
clean references for the high speed DIN, DIN*, LIN, LIN* inputs.
TTL Power Supply:
Normally 5.0 Volts. Used for all TTL receiver
output buffer cells.
V
CCTTL
32
52
53
72
S
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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